1/*
2 * Copyright 2003-2008, Haiku Inc. All rights reserved.
3 * Distributed under the terms of the MIT License.
4 *
5 * Authors:
6 * 		François Revol <revol@free.fr>
7 */
8
9#include <KernelExport.h>
10
11#include <arch_platform.h>
12#include <arch_thread.h>
13#include <arch/cpu.h>
14#include <boot/kernel_args.h>
15
16#ifdef __cplusplus
17extern "C" {
18#endif
19
20/* from arch_040_asm.S */
21extern void flush_insn_pipeline_040(void);
22extern void flush_atc_all_040(void);
23extern void flush_atc_user_040(void);
24extern void flush_atc_addr_040(addr_t addr);
25
26#ifdef __cplusplus
27}
28#endif
29
30
31
32#define CACHELINE 16
33
34static void
35sync_icache_040(addr_t address, size_t len)
36{
37	int l, off;
38	char *p;
39
40	off = (unsigned int)address & (CACHELINE - 1);
41	len += off;
42
43	l = len;
44	p = (char *)address - off;
45	asm volatile ("nop");
46
47#warning M68K: 040: use CPUSHP on pages when possible for speed.
48	do {
49		asm volatile (		\
50					  "cpushl %%ic,(%0)\n"		\
51					  :: "a"(p));
52		p += CACHELINE;
53	} while ((l -= CACHELINE) > 0);
54	asm volatile ("nop");
55}
56
57
58static void
59sync_dcache_040(addr_t address, size_t len)
60{
61	int l, off;
62	char *p;
63
64	off = (unsigned int)address & (CACHELINE - 1);
65	len += off;
66
67	l = len;
68	p = (char *)address - off;
69	asm volatile ("nop");
70
71#warning M68K: 040: use CPUSHP on pages when possible for speed.
72	do {
73		asm volatile (		\
74					  "cpushl %%dc,(%0)\n"		\
75					  :: "a"(p));
76		p += CACHELINE;
77	} while ((l -= CACHELINE) > 0);
78	asm volatile ("nop");
79}
80
81
82struct m68k_cpu_ops cpu_ops_040 = {
83	&flush_insn_pipeline_040,
84	&flush_atc_all_040,
85	&flush_atc_user_040,
86	&flush_atc_addr_040,
87	&sync_dcache_040,
88	&sync_icache_040,
89	NULL // idle
90};
91