1/*
2 * Copyright 2003, Thomas Kurschel. All Rights Reserved.
3 * Distributed under the terms of the MIT License.
4 */
5#ifndef _EDID_H
6#define _EDID_H
7
8//!	Extended Display Identification Data (EDID)
9
10#include "edid_raw.h"
11
12
13// vendor info
14typedef struct {
15	char manufacturer[4];
16	uint16 prod_id;
17	uint32 serial;
18	uint8 week;
19	uint16 year;
20} edid1_vendor;
21
22// version info
23typedef struct {
24	uint8 version;
25	uint8 revision;
26} edid1_version;
27
28// display info
29typedef struct {
30	BBITFIELD8_7 (
31		input_type : 1,		// 1 : digital
32		input_voltage : 2,	// 0=0.7V/0.3V, 1=0.714V/0.286,
33							// 2=1V/0.4V, 3=0.7V/0V
34		setup : 1,			// true if voltage configurable
35		sep_sync : 1,
36		comp_sync : 1,
37		sync_on_green : 1,
38		sync_serr : 1
39	);
40	uint8 h_size;
41	uint8 v_size;
42	uint8 gamma;	// (x+100)/100
43	BBITFIELD8_7 (
44		dpms_standby : 1,
45		dpms_suspend : 1,
46		dpms_off : 1,
47		display_type : 2,	// 0=mono, 1=rgb, 2=multicolour
48		// since EDID version 1.1
49		std_colour_space : 1,
50		preferred_timing_mode : 1,
51		gtf_supported : 1
52	);
53	uint16 red_x;		// all colours are 0.10 fixed point
54	uint16 red_y;
55	uint16 green_x;
56	uint16 green_y;
57	uint16 blue_x;
58	uint16 blue_y;
59	uint16 white_x;
60	uint16 white_y;
61} edid1_display;
62
63// standard timing data
64typedef struct {
65	uint16 h_size;
66	uint16 v_size;
67	uint16 id;
68	uint8 ratio;
69	uint8 refresh;
70} edid1_std_timing;
71
72// additional whitepoint
73typedef struct {
74	uint8 index;
75	uint16 white_x;
76	uint16 white_y;
77	uint8 gamma;	// (x+100)/100
78} edid1_whitepoint;
79
80// detailed timing description
81typedef struct {
82	uint16 pixel_clock; // in 10 kHz
83	uint16 h_active;
84	uint16 h_blank;
85	uint16 v_active;
86	uint16 v_blank;
87	uint16 h_sync_off;
88	uint16 h_sync_width;
89	uint16 v_sync_off;
90	uint16 v_sync_width;
91	uint16 h_size;
92	uint16 v_size;
93	uint16 h_border;
94	uint16 v_border;
95	BBITFIELD8_4 (
96		interlaced : 1,
97		stereo : 2,		// upper bit set - left on sync
98						// lower bit set - right on sync
99		sync : 2,
100		misc : 2
101	);
102} edid1_detailed_timing;
103
104// detailed monitor description
105typedef struct {
106	uint8 monitor_desc_type;
107	union {
108		char serial_number[EDID1_EXTRA_STRING_LEN];
109		char ascii_data[EDID1_EXTRA_STRING_LEN];
110		edid1_monitor_range monitor_range;
111		char monitor_name[EDID1_EXTRA_STRING_LEN];
112		edid1_whitepoint whitepoint[EDID1_NUM_EXTRA_WHITEPOINTS];
113		edid1_std_timing std_timing[EDID1_NUM_EXTRA_STD_TIMING];
114		edid1_detailed_timing detailed_timing;
115	} data;
116} edid1_detailed_monitor;
117
118// EDID data block
119typedef struct edid1_info {
120	edid1_vendor vendor;
121	edid1_version version;
122	edid1_display display;
123	edid1_established_timing established_timing;
124	edid1_std_timing std_timing[EDID1_NUM_STD_TIMING];
125
126	// since EDID version 1.2
127	edid1_detailed_monitor detailed_monitor[EDID1_NUM_DETAILED_MONITOR_DESC];
128
129	uint8 num_sections;
130} edid1_info;
131
132#define EDID_VERSION_1 1
133
134#ifdef __cplusplus
135extern "C" {
136#endif
137
138void edid_decode(edid1_info *edid, const edid1_raw *raw);
139void edid_dump(edid1_info *edid);
140
141#ifdef __cplusplus
142}
143#endif
144
145#endif	// _EDID_H
146