firewire.h revision fb52ab82
1/*-
2 * Copyright (c) 2003 Hidetoshi Shimokawa
3 * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 *    must display the acknowledgement as bellow:
16 *
17 *    This product includes software developed by K. Kobayashi and H. Shimokawa
18 *
19 * 4. The name of the author may not be used to endorse or promote products
20 *    derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 * POSSIBILITY OF SUCH DAMAGE.
33 *
34 * $FreeBSD: src/sys/dev/firewire/firewire.h,v 1.21 2007/04/24 12:15:05 simokawa Exp $
35 *
36 */
37
38#ifndef _FIREWIRE_H
39#define _FIREWIRE_H 1
40#ifdef __HAIKU__
41#include <stdint.h>
42#include <sys/ioccom.h>
43#endif
44
45#define	DEV_DEF  0
46#define	DEV_DV   2
47
48struct fw_isochreq {
49	unsigned char	ch:6,
50			tag:2;
51};
52
53struct fw_isobufreq {
54	struct fw_bufspec {
55		unsigned int nchunk;
56		unsigned int npacket;
57		unsigned int psize;
58	} tx, rx;
59};
60
61struct fw_addr {
62	uint32_t hi;
63	uint32_t lo;
64};
65
66struct fw_asybindreq {
67	struct fw_addr start;
68	unsigned long len;
69};
70
71struct fw_reg_req_t {
72	uint32_t addr;
73	uint32_t data;
74};
75
76#define MAXREC(x)	(2 << (x))
77#define FWPMAX_S400 (2048 + 20)	/* MAXREC plus space for control data */
78#define FWMAXQUEUE 128
79
80#define	FWLOCALBUS	0xffc0
81
82#define FWTCODE_WREQQ	0
83#define FWTCODE_WREQB	1
84#define FWTCODE_WRES	2
85#define FWTCODE_RREQQ	4
86#define FWTCODE_RREQB	5
87#define FWTCODE_RRESQ	6
88#define FWTCODE_RRESB	7
89#define FWTCODE_CYCS	8
90#define FWTCODE_LREQ	9
91#define FWTCODE_STREAM	0xa
92#define FWTCODE_LRES	0xb
93#define FWTCODE_PHY	0xe
94
95#define	FWRETRY_1	0
96#define	FWRETRY_X	1
97#define	FWRETRY_A	2
98#define	FWRETRY_B	3
99
100#define FWRCODE_COMPLETE	0
101#define FWRCODE_ER_CONFL	4
102#define FWRCODE_ER_DATA		5
103#define FWRCODE_ER_TYPE		6
104#define FWRCODE_ER_ADDR		7
105
106/*
107 * Defined 1394a-2000
108 * Table 5B-1
109 */
110#define FWSPD_S100	0
111#define FWSPD_S200	1
112#define FWSPD_S400	2
113#define FWSPD_S800      3
114#define FWSPD_S1600     4
115#define FWSPD_S3200     5
116
117#define	FWP_TL_VALID (1 << 7)
118
119struct fw_isohdr {
120	uint32_t hdr[1];
121};
122
123struct fw_asyhdr {
124	uint32_t hdr[4];
125};
126
127#if BYTE_ORDER == BIG_ENDIAN
128#define BIT4x2(x,y)	 uint8_t  x:4, y:4
129#define BIT16x2(x,y)	uint32_t x:16, y:16
130#else
131#define BIT4x2(x,y)	 uint8_t  y:4, x:4
132#define BIT16x2(x,y)	uint32_t y:16, x:16
133#endif
134
135
136#if BYTE_ORDER == BIG_ENDIAN
137#define COMMON_HDR(a,b,c,d)	uint32_t a:16,b:8,c:4,d:4
138#define COMMON_RES(a,b,c,d)	uint32_t a:16,b:4,c:4,d:8
139#else
140#define COMMON_HDR(a,b,c,d)	uint32_t d:4,c:4,b:8,a:16
141#define COMMON_RES(a,b,c,d)	uint32_t d:8,c:4,b:4,a:16
142#endif
143
144struct fw_pkt {
145	union {
146		uint32_t ld[0];
147		struct {
148			COMMON_HDR(, , tcode, );
149		} common;
150		struct {
151			COMMON_HDR(len, chtag, tcode, sy);
152			uint32_t payload[0];
153		} stream;
154		struct {
155			COMMON_HDR(dst, tlrt, tcode, pri);
156			BIT16x2(src, );
157		} hdr;
158		struct {
159			COMMON_HDR(dst, tlrt, tcode, pri);
160			BIT16x2(src, dest_hi);
161			uint32_t dest_lo;
162		} rreqq;
163		struct {
164			COMMON_HDR(dst, tlrt, tcode, pri);
165			COMMON_RES(src, rtcode, , );
166			uint32_t :32;
167		} wres;
168		struct {
169			COMMON_HDR(dst, tlrt, tcode, pri);
170			BIT16x2(src, dest_hi);
171			uint32_t dest_lo;
172			BIT16x2(len, extcode);
173		} rreqb;
174		struct {
175			COMMON_HDR(dst, tlrt, tcode, pri);
176			BIT16x2(src, dest_hi);
177			uint32_t dest_lo;
178			uint32_t data;
179		} wreqq;
180		struct {
181			COMMON_HDR(dst, tlrt, tcode, pri);
182			BIT16x2(src, dest_hi);
183			uint32_t dest_lo;
184			uint32_t data;
185		} cyc;
186		struct {
187			COMMON_HDR(dst, tlrt, tcode, pri);
188			COMMON_RES(src, rtcode, , );
189			uint32_t :32;
190			uint32_t data;
191		} rresq;
192		struct {
193			COMMON_HDR(dst, tlrt, tcode, pri);
194			BIT16x2(src, dest_hi);
195			uint32_t dest_lo;
196			BIT16x2(len, extcode);
197			uint32_t payload[0];
198		} wreqb;
199		struct {
200			COMMON_HDR(dst, tlrt, tcode, pri);
201			BIT16x2(src, dest_hi);
202			uint32_t dest_lo;
203			BIT16x2(len, extcode);
204			uint32_t payload[0];
205		} lreq;
206		struct {
207			COMMON_HDR(dst, tlrt, tcode, pri);
208			COMMON_RES(src, rtcode, , );
209			uint32_t :32;
210			BIT16x2(len, extcode);
211			uint32_t payload[0];
212		} rresb;
213		struct {
214			COMMON_HDR(dst, tlrt, tcode, pri);
215			COMMON_RES(src, rtcode, , );
216			uint32_t :32;
217			BIT16x2(len, extcode);
218			uint32_t payload[0];
219		} lres;
220	} mode;
221};
222
223/*
224 * Response code (rtcode)
225 */
226/* The node has successfully completed the command. */
227#define	RESP_CMP		0
228/* A resource conflict was detected. The request may be retried. */
229#define	RESP_CONFLICT_ERROR	4
230/* Hardware error, data is unavailable. */
231#define	RESP_DATA_ERROR		5
232/* A field in the request packet header was set to an unsupported or incorrect
233 * value, or an invalid transaction was attempted (e.g., a write to a read-only
234 * address). */
235#define	RESP_TYPE_ERROR		6
236/* The destination offset field in the request was set to an address not
237 * accessible in the destination node. */
238#define	RESP_ADDRESS_ERROR	7
239
240/*
241 * Extended transaction code (extcode)
242 */
243#define EXTCODE_MASK_SWAP	1
244#define EXTCODE_CMP_SWAP	2
245#define EXTCODE_FETCH_ADD	3
246#define EXTCODE_LITTLE_ADD	4
247#define EXTCODE_BOUNDED_ADD	5
248#define EXTCODE_WRAP_ADD	6
249
250struct fw_eui64 {
251	uint32_t hi, lo;
252};
253#define FW_EUI64_BYTE(eui, x) \
254	((((x)<4)?				\
255		((eui)->hi >> (8*(3-(x)))): 	\
256		((eui)->lo >> (8*(7-(x))))	\
257	) & 0xff)
258#define FW_EUI64_EQUAL(x, y) \
259	((x).hi == (y).hi && (x).lo == (y).lo)
260
261struct fw_asyreq {
262	struct fw_asyreq_t{
263		unsigned char sped;
264		unsigned int type;
265#define FWASREQNODE	0
266#define FWASREQEUI	1
267#define FWASRESTL	2
268#define FWASREQSTREAM	3
269		unsigned short len;
270		union {
271			struct fw_eui64 eui;
272		}dst;
273	}req;
274	struct fw_pkt pkt;
275	uint32_t data[512];
276};
277
278struct fw_devinfo {
279	struct fw_eui64 eui;
280	uint16_t dst;
281	uint16_t status;
282};
283
284#define FW_MAX_DEVLST 70
285struct fw_devlstreq {
286	uint16_t n;
287	uint16_t info_len;
288	struct fw_devinfo dev[FW_MAX_DEVLST];
289};
290
291/*
292 * Defined in IEEE 1394a-2000
293 * 4.3.4.1
294 */
295#define FW_SELF_ID_PORT_CONNECTED_TO_CHILD 3
296#define FW_SELF_ID_PORT_CONNECTED_TO_PARENT 2
297#define FW_SELF_ID_PORT_NOT_CONNECTED 1
298#define FW_SELF_ID_PORT_NOT_EXISTS 0
299
300#define FW_SELF_ID_PAGE0 0
301#define FW_SELF_ID_PAGE1 1
302
303#if BYTE_ORDER == BIG_ENDIAN
304union fw_self_id {
305	struct {
306		uint32_t  id:2,
307			  phy_id:6,
308			  sequel:1,
309			  link_active:1,
310			  gap_count:6,
311			  phy_speed:2,
312			  reserved:2,
313			  contender:1,
314			  power_class:3,
315			  port0:2,
316			  port1:2,
317			  port2:2,
318			  initiated_reset:1,
319			  more_packets:1;
320	} p0;
321	struct {
322		uint32_t
323			  id:2,
324			  phy_id:6,
325			  sequel:1,
326			  sequence_num:3,
327			  reserved2:2,
328			  port3:2,
329			  port4:2,
330			  port5:2,
331			  port6:2,
332			  port7:2,
333			  port8:2,
334			  port9:2,
335			  port10:2,
336			  reserved1:1,
337			  more_packets:1;
338	} p1;
339	struct {
340		uint32_t
341			  id:2,
342			  phy_id:6,
343			  sequel:1,
344			  sequence_num:3,
345			  :2,
346			  port11:2,
347			  port12:2,
348			  port13:2,
349			  port14:2,
350			  port15:2,
351			  :8;
352	} p2;
353};
354#else
355union fw_self_id {
356	struct {
357		uint32_t  more_packets:1,
358			  initiated_reset:1,
359			  port2:2,
360			  port1:2,
361			  port0:2,
362			  power_class:3,
363			  contender:1,
364			  reserved:2,
365			  phy_speed:2,
366			  gap_count:6,
367			  link_active:1,
368			  sequel:1,
369			  phy_id:6,
370			  id:2;
371	} p0;
372	struct {
373		uint32_t  more_packets:1,
374			  reserved1:1,
375			  port10:2,
376			  port9:2,
377			  port8:2,
378			  port7:2,
379			  port6:2,
380			  port5:2,
381			  port4:2,
382			  port3:2,
383			  reserved2:2,
384			  sequence_num:3,
385			  sequel:1,
386			  phy_id:6,
387			  id:2;
388	} p1;
389	struct {
390		uint32_t
391			  reserved3:8,
392			  port15:2,
393			  port14:2,
394			  port13:2,
395			  port12:2,
396			  port11:2,
397			  reserved4:2,
398			  sequence_num:3,
399			  sequel:1,
400			  phy_id:6,
401			  id:2;
402	} p2;
403};
404#endif
405
406
407struct fw_topology_map {
408	uint32_t crc:16,
409		 crc_len:16;
410	uint32_t generation;
411	uint32_t self_id_count:16,
412		 node_count:16;
413	union fw_self_id self_id[4*64];
414};
415
416struct fw_speed_map {
417	uint32_t crc:16,
418		 crc_len:16;
419	uint32_t generation;
420	uint8_t  speed[64][64];
421};
422
423struct fw_crom_buf {
424	struct fw_eui64 eui;
425	uint32_t len;
426	void *ptr;
427};
428
429/*
430 * FireWire specific system requests.
431 */
432#define	FW_SSTBUF	_IOWR('S', 86, struct fw_isobufreq)
433#define	FW_GSTBUF	_IOWR('S', 87, struct fw_isobufreq)
434#define	FW_SRSTREAM	_IOWR('S', 88, struct fw_isochreq)
435#define	FW_GRSTREAM	_IOWR('S', 89, struct fw_isochreq)
436#define	FW_STSTREAM	_IOWR('S', 90, struct fw_isochreq)
437#define	FW_GTSTREAM	_IOWR('S', 91, struct fw_isochreq)
438
439#define	FW_ASYREQ	_IOWR('S', 92, struct fw_asyreq)
440#define FW_IBUSRST	_IOR('S', 1, unsigned int)
441#define FW_GDEVLST	_IOWR('S', 2, struct fw_devlstreq)
442#define	FW_SBINDADDR	_IOWR('S', 3, struct fw_asybindreq)
443#define	FW_CBINDADDR	_IOWR('S', 4, struct fw_asybindreq)
444#define	FW_GTPMAP	_IOR('S', 5, struct fw_topology_map)
445#define	FW_GCROM	_IOWR('S', 7, struct fw_crom_buf)
446
447#define	FW_SDEUI64	_IOW('S', 20, struct fw_eui64)
448#define	FW_GDEUI64	_IOR('S', 21, struct fw_eui64)
449
450#define FWOHCI_RDREG	_IOWR('S', 80, struct fw_reg_req_t)
451#define FWOHCI_WRREG	_IOWR('S', 81, struct fw_reg_req_t)
452#define FWOHCI_RDPHYREG	_IOWR('S', 82, struct fw_reg_req_t)
453#define FWOHCI_WRPHYREG	_IOWR('S', 83, struct fw_reg_req_t)
454
455#define DUMPDMA		_IOWR('S', 82, uint32_t)
456
457#ifdef _KERNEL
458
459#define FWMAXNDMA 0x100 /* 8 bits DMA channel id. in device No. */
460
461#ifndef htonl
462#	define htonl(x) B_HOST_TO_BENDIAN_INT32(x)
463#	define ntohl(x) B_BENDIAN_TO_HOST_INT32(x)
464#	define htons(x) B_HOST_TO_BENDIAN_INT16(x)
465#	define ntohs(x) B_BENDIAN_TO_HOST_INT16(x)
466#endif
467
468#ifndef __HAIKU__
469#if defined(__DragonFly__) || __FreeBSD_version < 500000
470#define dev2unit(x)	((minor(x) & 0xff) | (minor(x) >> 8))
471#define unit2minor(x)	(((x) & 0xff) | (((x) << 8) & ~0xffff))
472#endif
473
474#define MAKEMINOR(f, u, s)	\
475	((f) | (((u) & 0xff) << 8) | (s & 0xff))
476#define DEV2UNIT(x)	((dev2unit(x) & 0xff00) >> 8)
477#define DEV2SUB(x)	(dev2unit(x) & 0xff)
478
479#define FWMEM_FLAG	0x10000
480#define DEV_FWMEM(x)	(dev2unit(x) & FWMEM_FLAG)
481#endif /* __HAIKU__ */
482#endif
483#ifdef __HAIKU__
484#define EX_NOINPUT 66
485#define EX_USAGE 64
486#endif /* __HAIKU__*/
487#endif
488