Searched refs:bus (Results 1 - 25 of 515) sorted by relevance

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/haiku/src/add-ons/kernel/bus_managers/scsi/
H A Dbusses.cpp7 Part of Open SCSI bus manager
11 Whenever a controller driver publishes a new controller, a new SCSI bus
13 bus is told to rescan for devices. For each device, there is a
23 // bus service should hurry up a bit - good controllers don't take much time
35 scsi_do_service(scsi_bus_info *bus) argument
41 if (scsi_check_exec_dpc(bus))
44 if (scsi_check_exec_service(bus))
57 scsi_bus_info *bus = (scsi_bus_info *)arg; local
60 SHOW_FLOW(3, "bus = %p", bus);
89 scsi_bus_info *bus; local
173 scsi_destroy_bus(scsi_bus_info *bus) argument
197 scsi_bus_info *bus; local
285 scsi_uninit_bus(scsi_bus_info *bus) argument
292 scsi_inquiry_path(scsi_bus bus, scsi_path_inquiry *inquiry_data) argument
300 scsi_reset_bus(scsi_bus_info *bus) argument
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H A Ddpc.cpp7 Part of Open SCSI bus manager
11 DPC are executed by the service thread of the bus
46 scsi_schedule_dpc(scsi_bus_info *bus, scsi_dpc_info *dpc, /*int flags,*/ argument
49 SHOW_FLOW(3, "bus=%p, dpc=%p", bus, dpc);
50 acquire_spinlock_irq(&bus->dpc_lock);
57 dpc->next = bus->dpc_list;
58 bus->dpc_list = dpc;
62 release_spinlock_irq(&bus->dpc_lock);
65 release_sem_etc(bus
73 scsi_check_exec_dpc(scsi_bus_info *bus) argument
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H A Dqueuing.h7 Part of Open SCSI bus manager
9 Handling of bus/device blocking. Inline functions defined
10 here don't wake service thread if required and don't lock bus, so
61 ADD_CDL_LIST_HEAD( device, scsi_device_info, device->bus->waiting_devices, waiting_ );
74 ADD_CDL_LIST_TAIL( device, scsi_device_info, device->bus->waiting_devices, waiting_ );
87 REMOVE_CDL_LIST( device, device->bus->waiting_devices, waiting_ );
93 // set overflow bit of device; this will not remove device from bus queue!
101 // set overflow bit of bus
103 static inline void scsi_set_bus_overflow( scsi_bus_info *bus )
105 bus
134 scsi_unblock_bus_noresume( scsi_bus_info *bus, bool by_SIM ) argument
162 scsi_block_bus_nolock( scsi_bus_info *bus, bool by_SIM ) argument
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H A Dbus_raw.cpp7 //! Devfs entry for raw bus access.
19 // info about bus
20 // (used both as bus cookie and file handle cookie)
33 bus_raw_info *bus; local
35 bus = (bus_raw_info*)malloc(sizeof(*bus));
36 if (bus == NULL)
41 (driver_module_info **)&bus->interface, (void **)&bus->cookie);
44 bus
52 scsi_bus_raw_uninit(void *bus) argument
59 scsi_bus_raw_open(void *bus, const char *path, int openMode, void **handle_cookie) argument
84 bus_raw_info *bus = (bus_raw_info*)_cookie; local
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H A Dscsi_io.cpp8 //! Part of Open SCSI bus manager
19 /** put request back in queue because of device/bus overflow */
24 scsi_bus_info *bus = request->bus; local
37 ACQUIRE_BEN(&bus->mutex);
39 was_servicable = scsi_can_service_bus(bus);
41 if (bus->left_slots++ == 0)
42 scsi_unblock_bus_noresume(bus, false);
51 // bus has overflown
52 scsi_set_bus_overflow(bus);
86 scsi_bus_info *bus = request->bus; local
206 scsi_bus_info *bus = request->bus; local
241 scsi_bus_info *bus = request->bus; local
341 scsi_bus_info *bus = request->bus; local
393 scsi_bus_info *bus = request->bus; local
525 scsi_bus_info *bus = ccb_to_terminate->bus; local
534 scsi_bus_info *bus = req_to_abort->bus; local
589 scsi_check_exec_service(scsi_bus_info *bus) argument
[all...]
H A Dqueuing.cpp7 Part of Open SCSI bus manager
18 HBAs as in this case the queuing is done by the SCSI bus manager
21 Requests can be blocked by SIM or by the SCSI bus manager on a per-device
22 or per-bus basis. There are three possible reasons:
25 - detected by bus manager automatically, or
27 2. SIM blocks bus/device explictely
28 3. bus manager blocks bus/device explictly (currently used for
30 4. the device has queued requests or the bus has waiting devices resp.
34 third cases, the SIM/bus manage
232 scsi_unblock_bus_int( scsi_bus_info *bus, bool by_SIM ) argument
263 scsi_bus_info *bus = device->bus; local
319 scsi_bus_info *bus = device->bus; local
353 scsi_block_bus_int( scsi_bus_info *bus, bool by_SIM ) argument
375 scsi_bus_info *bus = device->bus; local
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H A Dccb.cpp7 Part of Open SCSI bus manager
34 ccb = (scsi_ccb *)locked_pool->alloc(device->bus->ccb_pool);
62 locked_pool->free(ccb->bus->ccb_pool, ccb);
70 scsi_bus_info *bus = (scsi_bus_info *)arg; local
73 ccb->bus = bus;
74 ccb->path_id = bus->path_id;
94 scsi_init_ccb_alloc(scsi_bus_info *bus) argument
97 // the bus is not ready yet so the CCB cannot be initialized
99 bus
111 scsi_uninit_ccb_alloc(scsi_bus_info *bus) argument
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/haiku/src/add-ons/kernel/drivers/dvb/cx23882/
H A Di2c_core.c37 static status_t i2c_writebyte(i2c_bus *bus, uint8 byte, int *ack);
38 static status_t i2c_readbyte(i2c_bus *bus, uint8 *pbyte);
39 static status_t i2c_read_unlocked(i2c_bus *bus, int address, void *data, int size);
40 static status_t i2c_write_unlocked(i2c_bus *bus, int address, const void *data, int size);
65 i2c_bus *bus = malloc(sizeof(i2c_bus)); local
66 if (!bus)
69 bus->sem = create_sem(1, "i2c bus access");
70 if (bus->sem < 0) {
71 free(bus);
93 i2c_delete_bus(i2c_bus *bus) argument
103 set_sda_low(i2c_bus *bus) argument
111 set_sda_high(i2c_bus *bus) argument
119 set_scl_low(i2c_bus *bus) argument
127 set_scl_high(i2c_bus *bus) argument
142 i2c_start(i2c_bus *bus) argument
150 i2c_stop(i2c_bus *bus) argument
159 i2c_start_address(i2c_bus *bus, int address, int read ) argument
195 i2c_writebyte(i2c_bus *bus, uint8 byte, int *ack) argument
237 i2c_readbyte(i2c_bus *bus, uint8 *pbyte) argument
258 i2c_read_unlocked(i2c_bus *bus, int address, void *data, int size) argument
302 i2c_write_unlocked(i2c_bus *bus, int address, const void *data, int size) argument
345 i2c_read(i2c_bus *bus, int address, void *data, int size) argument
356 i2c_write(i2c_bus *bus, int address, const void *data, int size) argument
367 i2c_xfer(i2c_bus *bus, int address, const void *write_data, int write_size, void *read_data, int read_size) argument
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H A Dcx22702.h31 status_t cx22702_reg_write(i2c_bus *bus, uint8 reg, uint8 data);
32 status_t cx22702_reg_read(i2c_bus *bus, uint8 reg, uint8 *data);
34 status_t cx22702_init(i2c_bus *bus);
36 status_t cx22702_get_frequency_info(i2c_bus *bus, dvb_frequency_info_t *info);
38 status_t cx22702_set_tuning_parameters(i2c_bus *bus, const dvb_t_tuning_parameters_t *params);
39 status_t cx22702_get_tuning_parameters(i2c_bus *bus, dvb_t_tuning_parameters_t *params);
41 status_t cx22702_get_status(i2c_bus *bus, dvb_status_t *status);
42 status_t cx22702_get_ss(i2c_bus *bus, uint32 *ss);
43 status_t cx22702_get_ber(i2c_bus *bus, uint32 *ber);
44 status_t cx22702_get_snr(i2c_bus *bus, uint3
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H A Ddtt7592.h31 status_t dtt7592_write(i2c_bus *bus, const uint8 data[4]);
32 status_t dtt7592_read(i2c_bus *bus, uint8 *data);
34 status_t dtt7592_set_frequency(i2c_bus *bus, uint32 frequency, dvb_bandwidth_t bandwidth);
36 void dtt7582_test(i2c_bus *bus);
H A Ddtt7592.c38 dtt7592_write(i2c_bus *bus, const uint8 data[4]) argument
42 res = i2c_write(bus, I2C_ADDR_PLL, data, 4);
50 dtt7592_read(i2c_bus *bus, uint8 *data) argument
53 res = i2c_read(bus, I2C_ADDR_PLL, data, 1);
61 dtt7592_set_frequency(i2c_bus *bus, uint32 frequency, dvb_bandwidth_t bandwidth) argument
105 res = dtt7592_write(bus, data);
114 res = dtt7592_write(bus, data);
125 res = dtt7592_write(bus, data);
137 dtt7582_dump(i2c_bus *bus)
140 if (B_OK != dtt7592_read(bus,
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H A Dcx22702.c42 cx22702_reg_dump(i2c_bus *bus)
47 if (cx22702_reg_read(bus, i, &data) != B_OK)
57 cx22702_reg_write(i2c_bus *bus, uint8 reg, uint8 data) argument
61 res = i2c_write(bus, I2C_ADDR_DEMOD, buf, 2);
69 cx22702_reg_read(i2c_bus *bus, uint8 reg, uint8 *data) argument
72 res = i2c_xfer(bus, I2C_ADDR_DEMOD, &reg, 1, data, 1);
80 cx22702_init(i2c_bus *bus) argument
82 if (cx22702_reg_write(bus, 0x00, 0x02) != B_OK) return B_ERROR;
83 if (cx22702_reg_write(bus, 0x00, 0x00) != B_OK) return B_ERROR;
85 if (cx22702_reg_write(bus,
101 cx22702_get_frequency_info(i2c_bus *bus, dvb_frequency_info_t *info) argument
112 cx22702_set_tuning_parameters(i2c_bus *bus, const dvb_t_tuning_parameters_t *params) argument
207 cx22702_get_tuning_parameters(i2c_bus *bus, dvb_t_tuning_parameters_t *params) argument
232 cx22702_get_status(i2c_bus *bus, dvb_status_t *status) argument
254 cx22702_get_ss(i2c_bus *bus, uint32 *ss) argument
265 cx22702_get_ber(i2c_bus *bus, uint32 *ber) argument
289 cx22702_get_snr(i2c_bus *bus, uint32 *snr) argument
299 cx22702_get_upc(i2c_bus *bus, uint32 *upc) argument
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/haiku/src/add-ons/accelerants/common/
H A Di2c.c31 I2c timings, rounded up (Philips 1995 i2c bus specification, p20)
94 wait_for_clk(const i2c_bus *bus, bigtime_t timeout) argument
99 spin(bus->timing.r);
106 bus->get_signals(bus->cookie, &clk, &data);
115 spin(bus->timing.r);
122 send_start_condition(const i2c_bus *bus) argument
126 bus->set_signals(bus->cookie, 1, 1);
128 status = wait_for_clk(bus, bu
146 send_stop_condition(const i2c_bus *bus) argument
172 send_bit(const i2c_bus *bus, uint8 bit, int timeout) argument
198 send_acknowledge(const i2c_bus *bus) argument
249 send_byte(const i2c_bus *bus, uint8 byte, bool acknowledge) argument
271 send_slave_address(const i2c_bus *bus, int slaveAddress, bool isWrite) argument
301 receive_bit(const i2c_bus *bus, bool *bit, int timeout) argument
339 receive_byte(const i2c_bus *bus, uint8 *resultByte, bool acknowledge) argument
368 send_bytes(const i2c_bus *bus, const uint8 *writeBuffer, ssize_t writeLength) argument
384 receive_bytes(const i2c_bus *bus, uint8 *readBuffer, ssize_t readLength) argument
403 i2c_send_receive(const i2c_bus *bus, int slaveAddress, const uint8 *writeBuffer, size_t writeLength, uint8 *readBuffer, size_t readLength) argument
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H A Dddc.c59 ddc2_read(const i2c_bus *bus, int start, uint8 *buffer, size_t length) argument
69 status = i2c_send_receive(bus, 0xa0, writeBuffer,
95 ddc2_read_vdif(const i2c_bus *bus, int start,
106 res = ddc2_read(bus, start, buffer, 64);
120 ddc2_read(bus, start + i * 64, cur_data, 64);
136 ddc2_init_timing(i2c_bus *bus) argument
138 i2c_get100k_timing(&bus->timing);
141 bus->timing.start_timeout = 550;
142 bus->timing.byte_timeout = 2200;
143 bus
151 ddc2_read_edid1(const i2c_bus *bus, edid1_info *edid, void **vdif, size_t *vdifLength) argument
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/haiku/src/add-ons/kernel/busses/virtio/
H A Dvirtio_pci.cpp11 #include <bus/PCI.h>
70 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)data; local
71 uint8 isr = bus->pci->read_io_8(bus->device,
72 bus->base_addr + VIRTIO_PCI_ISR);
77 gVirtio->config_interrupt_handler(bus->sim);
80 gVirtio->queue_interrupt_handler(bus->sim, INT16_MAX);
89 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)data; local
90 gVirtio->config_interrupt_handler(bus->sim);
107 virtio_pci_setup_msix_interrupts(virtio_pci_sim_info* bus) argument
145 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
154 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
169 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
180 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
190 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
201 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
233 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
263 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
275 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
288 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
397 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
427 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)cookie; local
442 virtio_pci_sim_info* bus = new(std::nothrow) virtio_pci_sim_info; local
495 virtio_pci_sim_info* bus = (virtio_pci_sim_info*)bus_cookie; local
600 const char* bus; local
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H A Dvirtio_pci.h75 #define VIRTIO_PCI_CONFIG(bus) \
76 ((bus->irq_type != VIRTIO_IRQ_LEGACY) ? 24 : 20)
/haiku/3rdparty/mmu_man/scripts/
H A DHardwareChecker.sh94 bus="pci"
114 echo "<div>Identification: <input type='text' id='$bus${devn}_desc' name='$bus${devn}_desc' value='$descline' readonly='readonly' size='80' /></div>"
121 echo "<input type='radio' name='$bus${devn}_status' id='$bus${devn}_status_ok' value='ok' /><label for='$bus${devn}_status_ok' class='status_ok'>Working</label>"
124 echo "<input type='radio' name='$bus${devn}_status' id='$bus${devn}_status_ko' value='ko' /><label for='$bus${devn}_status_ko' class='status_ko'>Not working</label>"
127 echo "<input type='radio' name='$bus
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/haiku/headers/private/graphics/common/
H A Dddc.h17 void ddc2_init_timing(i2c_bus *bus);
21 status_t ddc2_read_edid1(const i2c_bus *bus, edid1_info *edid,
/haiku/src/add-ons/accelerants/3dfx/
H A D3dfx_edid.cpp49 i2c_bus bus; local
51 bus.cookie = (void*)NULL;
52 bus.set_signals = &SetI2CSignals;
53 bus.get_signals = &GetI2CSignals;
54 ddc2_init_timing(&bus);
59 bool bResult = (ddc2_read_edid1(&bus, &edidInfo, NULL, NULL) == B_OK);
/haiku/src/add-ons/accelerants/s3/
H A Dvirge_edid.cpp94 i2c_bus bus; local
95 bus.cookie = (void*)(addr_t)DDCPort;
96 bus.set_signals = &SetI2CSignals_Alt;
97 bus.get_signals = &GetI2CSignals_Alt;
98 ddc2_init_timing(&bus);
103 bResult = (ddc2_read_edid1(&bus, &edidInfo, NULL, NULL) == B_OK);
107 i2c_bus bus; local
108 bus.cookie = (void*)DDC_REG;
109 bus.set_signals = &SetI2CSignals;
110 bus
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/haiku/src/add-ons/kernel/drivers/network/atheros813x/
H A Dglue.c1 #include <sys/bus.h>
/haiku/src/add-ons/kernel/bus_managers/pci/
H A Dpci_fixup.cpp25 jmicron_fixup_ahci(PCI *pci, uint8 domain, uint8 bus, uint8 device, argument
42 dprintf("jmicron_fixup_ahci: domain %u, bus %u, device %u, function %u, "
43 "deviceId 0x%04x\n", domain, bus, device, function, deviceId);
46 uint32 val = pci->ReadConfig(domain, bus, device, function, 0x40, 4);
71 pci->WriteConfig(domain, bus, device, function, 0x40, 4, val);
75 uint8 irq = pci->ReadConfig(domain, bus, device, function, 0x3c, 1);
78 pci->WriteConfig(domain, bus, device, 1, 0x3c, 1, irq);
83 intel_fixup_ahci(PCI *pci, uint8 domain, uint8 bus, uint8 device, argument
108 dprintf("intel_fixup_ahci: domain %u, bus %u, device %u, function %u, "
109 "deviceId 0x%04x\n", domain, bus, devic
159 ati_fixup_ixp(PCI *pci, uint8 domain, uint8 bus, uint8 device, uint8 function, uint16 deviceId) argument
191 pci_fixup_device(PCI *pci, uint8 domain, uint8 bus, uint8 device, uint8 function) argument
[all...]
/haiku/src/add-ons/kernel/bus_managers/pci/arch/x86/
H A Dpci_irq.cpp18 uint8 bus, uint8 device, uint8 function,
27 uint8 bus, uint8 device, uint8 function,
17 pci_x86_irq_read(void *cookie, uint8 bus, uint8 device, uint8 function, uint8 pin, uint8 *irq) argument
26 pci_x86_irq_write(void *cookie, uint8 bus, uint8 device, uint8 function, uint8 pin, uint8 irq) argument
H A Dpci_irq.h14 uint8 bus, uint8 device, uint8 function,
18 uint8 bus, uint8 device, uint8 function,
/haiku/headers/os/drivers/
H A DPCI_x86.h15 uint8 bus, /* bus number */
16 uint8 device, /* device # on bus */
20 uint8 bus, /* bus number */
21 uint8 device, /* device # on bus */
26 uint8 bus, /* bus number */
27 uint8 device, /* device # on bus */
31 uint8 bus, /* bu
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