History log of /haiku/src/add-ons/accelerants/intel_extreme/Ports.cpp
Revision Date Author Comments
# b1c582ba 05-Oct-2019 Adrien Destugues <pulkomandy@pulkomandy.tk>

intel_extreme: disable FDI training for now.

It just deadlocks, so let's try to go without it and hope for the best?

Should fix #14301

Change-Id: I3cbd6e800a64da31f1fb1f1fb66b088e0298596e
Reviewed-on: https://review.haiku-os.org/c/haiku/+/1899
Reviewed-by: waddlesplash <waddlesplash@gmail.com>


# adc0f76e 25-Aug-2016 Adrien Destugues <pulkomandy@pulkomandy.tk>

More SandyBridge fixes and cleanups

Modesetting
===========

My previous hack was setting the transcoder registers, instead of the
display ones. Do that the way it is designed in the driver instead:

- If there is a transcoder, set its registers, but do not set the
display timings. The display will remain set at its native (and only)
resolution, and panel fitting will adjust the output of the transcoder
to match.
- If there is no transcoder, set the display registers directly to the
native resolution, as it was done on previous generation devices.
- fPipeOffset hacks no longer needed

DPMS
====

It seems the panel control register is not readable on PCH? Anyway, the
code would loop forever waiting for the bit to become unset when turning
the display off. Waiting seems to not be needed, so just remove it as
well as the "unlock" bit, which does not work for me and results in a
black screen.

Remaining hacks
===============

I still need to force HEAD_MODE_A_ANALOG to get output on pipe B (LVDS
display) working. I suspect something is common to the two pipes or not
allocated to the right one.

This version will have less side effects on other generations and help
with getting things to work on SandyBridge and possibly later devices.
Please test and report.


# bb4190f0 01-Jun-2016 Adrien Destugues <pulkomandy@pulkomandy.tk>

Fix SandyBridge support.

This reverts commit 4f2b258c32efeab97f043519b7f2d4e22819d431.
This reverts commit c86f3dba238a44a8fcf7b1452c46f1cab68f525a.
This reverts commit 61fbdb0667c57f6d3d11d33bce6c01bdd625aaec.
This reverts commit b3f14fb7c715cf95b374ee749dcafd5537d1b017.


# c0d4def4 29-Jul-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Implement Ilk PCH FDI link training

* IronLake tested and FDI says it trains successfully
* Still no LVDS video on Ilk


# 49cabb0d 12-Jul-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Fix regression from hrev50410; #12855


# 17ecf642 11-Jul-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: LVDS pipe only *has* to be B when gen < 4


# 92e254d0 10-Jul-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Improve PCH detection

* Detect PCH model based on ISA bridge and save
into shared info for later use.
* On CougarPoint PCH systems, assign pipes via
special CPT registers
* Drop HasPlatformControlHub as PCH should be
based on more than just generation.


# 9407ab29 09-May-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Rework PLL calculation

* More like linux, improved G4x calculations
* Reduce un-needed pll limit complexity
* Improved pll limits on ports based on type


# 95e38537 09-May-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Tab cleanup; no functional change.

* It seems like the Atom editor has been injecting
spaces in strange spots.
* Clean up spaces. Should help gcc6 as well.
* Sorry for the mess! Atom is on probation.


# 5265115b 05-May-2016 Murai Takashi <tmurai01@gmail.com>

Ports.cpp: fix gcc6 build

* Reindent source code, to fix gcc6
'-Werror=misleading-indentation' warnings.


# 8fe50548 08-May-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Extend DDI port probing to A-E

* The Linux code made this a bit hard to figure out via
complex define functions, however there can be up to
5 DDI ports (A-E)


# dee0f365 28-Apr-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Improve LVDS panel detection robustness

* If older generation, check for mobile. If mobile GPU
is found, make an assumption that a LVDS panel exists
and attempt to leverage the vbios or VESA EDID.


# 3b0f09db 15-Apr-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Fix blurry native LVDS mode

* Intel panel scaling was making native mode blury
* Resolutions < native result in a non-scaled screen for now.
* We should look into using the hardware scaler vs
doing fake scaling.
* Resolves #12716


# 10f2e843 09-Apr-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Power up DDI


# ca95e9da 15-Mar-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Add initial work for DDI ports


# 3d1bd895 11-Mar-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Properly use VBIOS panel mode

* Move current_mode into the accelerant as the
driver doesn't care.
* Record panel_mode in driver and present to accelerant
* eDP, if no EDID and mobile, leave edid incomplete.
Mode set should notice that and fall back to panel_mode


# 236a3e93 23-Feb-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extrme: Better tracing, note when dp no-link


# 721ba9af 23-Feb-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Clean up DisplayPort Port class

* DisplayPort != DigitalPort
* i2c needs wrapped in DP AUX transaction code
* Mode-setting comes with DP link training as well
* We need to try and share DP code with radeon_hd


# c9c61669 18-Feb-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Add general pipe configuration and adjust color space


# b979c66c 08-Jan-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Move rest of pipe control into pipe class


# 5b0b486b 03-Jan-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Correct LVDS DPLL mode on gen 3


# af0dad47 03-Jan-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Fix DPLL mode selection on gen 3

* Gen 3 chipsets also have this DPLL mode. 0 is reserved.


# d35a52e8 03-Jan-2016 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Fix i965 LVDS panel programming

* polarity regs move on LVDS vs analog
* add knowledge or transcoder registers, they
exist seperately on PCH-split
* Native resolutions now work on LVDS under i965


# 0ea662e5 15-Dec-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Correct panel control register on non-pch


# 5202e45a 05-Dec-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Improve LVDS CLKB desire detection


# b01aed83 23-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Don't store pipes within ports

* Store pipes within accelerant, and tell ports
about them.
* Rebrand DisplayPipe class to Pipe


# 86427512 24-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Fix LVDS polarity flags


# bc98dc42 23-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Improve LVDS panel control

* Disable panel before modification
* Properly wait for panel power


# e6fefa6c 19-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: More FDI training work

* IvyBridge or higher can auto-train.
* Linux doesn't use this feature, however
manual FDI link training is *really*
complex... lets try auto-training first.


# 00e0982f 17-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: First work at programming FDI


# e5494f1b 16-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Fix DP / HDMI gpu register location mixup on die


# 21e840d1 13-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Cleanup pipe enablement ordering


# f979e62e 12-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Program more LVDS regs. Set +/- @ lvds port


# 39f61d21 12-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Store current display mode on each port


# eb56837d 12-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Disable lvds panel_fitter for now


# 222f5929 11-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Make sure we power up the panel after modesetting


# de048108 10-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Program multiplier divisors


# be3f7a8f 10-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: tracing cleanup; no functional change


# 92bcdd79 09-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Add initial TMDS modesetting code


# 61fbdb06 08-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Set mode and pll via pipe-aware class functions


# 6e1ff82f 08-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Begin using new DisplayPipe class


# 37b903fb 08-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Add pipe selection for ports


# fb255821 04-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Correct generations based on some Intel help


# c86f3dba 02-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: LVDS cleanup and fixes for later gens


# 84b7116d 01-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Rework card identification defines

* Be more verbose on flag type
* Add additional groups
* Add additional families
* Correctly assign later models


# 62fbfdaa 01-Nov-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Undo a suspect PLL change from mmlr's branch


# b3f14fb7 25-Oct-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Start doing mode-setting at port level

* I really hope we can kill head_mode some day
* Break pll code out from mode code
* The LVDS and Digital are smooshed together and
likely need broken apart.


# e747cbe1 23-Oct-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Fix regs, remove PCH for VLV, Expand Type

* Fix some incorrect HDMI reg locations
* PCH goes away on later Intel chips
* Add more mask room for Intel Groups


# bc5cad73 18-Oct-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Correct card identification, add gen4 hdmi regs


# 27134c66 17-Oct-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Dump more info on ports found. Build fixes.


# 50f0b3fe 17-Oct-2015 Alexander von Gluck IV <kallisti5@unixzen.com>

intel_extreme: Rebase and refactor mmlr's work from 2013

* New port storage classes and cleaner logic