History log of /haiku/headers/private/kernel/arch/x86/arch_cpu.h
Revision Date Author Comments
# 26e0b0c8 24-Aug-2019 Augustin Cavalier <waddlesplash@gmail.com>

kernel/x86_64: Add errata patching.

The patched errata are only the AMD ones FreeBSD patches
(it seems there are no Intel errata that can be patched
this way, they are all in microcode updates ... or can't
be patched in the CPU at all.)

This also seems to be roughly the point in the boot that
FreeBSD patches these, too, despite how "critical" some
of them seem.

Change-Id: I9065f8d025332418a21c2cdf39afd7d29405edcc
Reviewed-on: https://review.haiku-os.org/c/haiku/+/1740
Reviewed-by: Jessica Hamilton <jessica.l.hamilton@gmail.com>


# 6086986d 04-Jan-2019 Rob Gill <rrobgill@protonmail.com>

kernel/x86: additional msr and cpuid items

Adds SSBD and L1TF related items

Change-Id: Iccea2bb9e057e0d011a18609212f175f9b5e678d
Reviewed-on: https://review.haiku-os.org/825
Reviewed-by: Adrien Destugues <pulkomandy@pulkomandy.tk>


# 513403d4 14-Jun-2018 Augustin Cavalier <waddlesplash@gmail.com>

Revert team and thread changes for COMPAT_MODE (hrev52010 & hrev52011).

This reverts commit c558f9c8fe54bc14515aa62bac7826271289f0e4.
This reverts commit 44f24718b1505e8d9c75e00e59f2f471a79b5f56.
This reverts commit a69cb330301c4d697daae57e6019a307f285043e.
This reverts commit 951182620e297d10af7fdcfe32f2b04d56086ae9.

There have been multiple reports that these changes break mounting NTFS partitions
(on all systems, see #14204), and shutting down (on certain systems, see #12405.)
Until they can be fixed, they are being backed out.


# 44f24718 20-May-2018 Jérôme Duval <jerome.duval@gmail.com>

kernel/x86_64: add compatibility source files to the build.

* add x86 versions of fnsave frstor.
* add missing declaration for elf32_resolve_symbol().

How-to build a x86_64/x86 bootstrap build:
mkdir generated_bootstrap; cd generated_bootstrap
../configure --bootstrap /dir/to/haikuporter/haikuporter /dir/to/haikuports.cross \
/dir/to/haikuports --build-cross-tools x86_64 /dir/to/buildtools --build-cross-tools x86 -j8 --use-gcc-pipe
jam -q -sHAIKU_PORTER_EXTRA_OPTIONS="-j8 --sourceforge-mirror=freefr --no-source-packages" @bootstrap-raw

Change-Id: I6eae3653c42a53683ae307107fae595c4b8ebcfb


# 3a764d6a 22-Apr-2018 Jérôme Duval <jerome.duval@gmail.com>

kernel: x86: add some msr and cpuid features

* for arch capabilities.
* for spec ctrl and pred cmd.


# 9dd4d2dd 03-Jan-2018 Jérôme Duval <jerome.duval@gmail.com>

kernel: support for Intel SMAP and SMEP on x86_64.

SMAP will generated page faults when the kernel tries to access user pages unless overriden.
If SMAP is enabled, the override instructions are written where needed in memory with
binary "altcodepatches".
Support is enabled by default, might be disabled per safemode setting.

Change-Id: Ife26cd765056aeaf65b2ffa3cadd0dcf4e273a96


# 483c4584 15-Jan-2018 Jérôme Duval <jerome.duval@gmail.com>

kernel: x86: add some more cpuid flags.


# 94090214 21-Dec-2017 Jérôme Duval <jerome.duval@gmail.com>

kernel: x86: add cpuid feature 7 flags.


# d0a92cb6 01-Feb-2017 Jérôme Duval <jerome.duval@gmail.com>

x86: added a MSR definition.


# d6aaebc7 23-Dec-2014 Jérôme Duval <jerome.duval@gmail.com>

x86: added two MSR definitions.


# 396b7422 10-Sep-2014 Paweł Dziepak <pdziepak@quarnos.org>

kernel/x86_64: save fpu state at interrupts

The kernel is allowed to use fpu anywhere so we must make sure that
user state is not clobbered by saving fpu state at interrupt entry.
There is no need to do that in case of system calls since all fpu
data registers are caller saved.

We do not need, though, to save the whole fpu state at task swich
(again, thanks to calling convention). Only status and control
registers are preserved. This patch actually adds xmm0-15 register
to clobber list of task swich code, but the only reason of that is
to make sure that nothing bad happens inside the function that
executes that task swich. Inspection of the generated code shows
that no xmm registers are actually saved.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>


# b41f2810 06-Sep-2014 Paweł Dziepak <pdziepak@quarnos.org>

boot/x86_64: enable sse early

Enable SSE as a part of the "preparation of the environment to run any
C or C++ code" in the entry points of stage2 bootloader.

SSE2 is going to be used by memset() and memcpy().

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>


# 6156a508 06-Sep-2014 Paweł Dziepak <pdziepak@quarnos.org>

kernel/x86[_64]: remove get_optimized_functions from cpu modules

The possibility to specify custom memcpy and memset implementations
in cpu modules is currently unused and there is generally no point
in such feature.

There are only 2 x86 vendors that really matter and there isn't
very big difference in performance of the generic optmized versions
of these funcions across different models. Even if we wanted different
versions of memset and memcpy depending on the processor model or
features much better solution would be to use STT_GNU_IFUNC and save
one indirect call.

Long story short, we don't really benefit in any way from
get_optimized_functions and the feature it implements and it only adds
unnecessary complexity to the code.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>


# 4b75a1e2 25-Aug-2014 Paweł Dziepak <pdziepak@quarnos.org>

kernel/x86_64: implement x86_swap_pgdir in C++

No reason not to inline this function.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>


# 76636769 06-May-2014 Pawel Dziepak <pdziepak@quarnos.org>

kernel/x86_64: inline x86_{read, write}_msr()

This patch makes it possible to inline rdmsr and wrmsr instruction. The
performance impact shouldn't be significant since they are used relatively
rarely and wrmsr is usually a serializing instruction, but there is no reason
not to do so.


# 88e8e24c 06-May-2014 Pawel Dziepak <pdziepak@quarnos.org>

kernel/x86_64: improve context switch implementation

The goal of this patch is to amortize the cost of context switch by making
the compiler aware that context switch clobbers all registers. Because all
register need to be saved anyway there is no additional cost of using
callee saved register in the function that does the context switch.


# e3d001ff 19-Dec-2013 Pawel Dziepak <pdziepak@quarnos.org>

x86: Implement multicast ICIs


# 611376fe 16-Dec-2013 Pawel Dziepak <pdziepak@quarnos.org>

x86: Let each CPU have its own GDT


# 3514fd77 28-Nov-2013 Pawel Dziepak <pdziepak@quarnos.org>

kernel: Reduce lock contention when processing ICIs


# 7db89e8d 25-Nov-2013 Pawel Dziepak <pdziepak@quarnos.org>

kernel: Rework cpuidle module

* Create new interface for cpuidle modules (similar to the cpufreq
interface)
* Generic cpuidle module is no longer needed
* Fix and update Intel C-State module


# 0e94a12f 24-Nov-2013 Pawel Dziepak <pdziepak@quarnos.org>

kernel: Make CACHE_LINE_ALIGN visible in the whole kernel


# 9c0ff0ee 29-Oct-2013 Pawel Dziepak <pdziepak@quarnos.org>

kernel: Add cpufreq module for Intel P-states

Since Sandy Bridge managing P-states on Intel processors is much easier
and more powerful than when using previous versions of EIST.


# 36cc64a9 02-Oct-2013 Pawel Dziepak <pdziepak@quarnos.org>

x86[_64]: Add CPU cache topology detection for AMD and Intel CPUs


# 78777340 26-Aug-2013 Jérôme Duval <jerome.duval@gmail.com>

Added x2APIC support.

* Mostly useful for virtualization at the moment. Works in QEmu.
* Can be enabled by safemode settings/menu.
* Please note that x2APIC normally requires use of VT-d interrupt remapping feature
on real hardware, which we don't support yet.


# 966f2076 06-Mar-2013 Pawel Dziepak <pdziepak@quarnos.org>

x86: enable data execution prevention

Set execute disable bit for any page that belongs to area with neither
B_EXECUTE_AREA nor B_KERNEL_EXECUTE_AREA set.

In order to take advanage of NX bit in 32 bit protected mode PAE must be
enabled. Thus, from now on it is also enabled when the CPU supports NX bit.

vm_page_fault() takes additional argument which indicates whether page fault
was caused by an illegal instruction fetch.


# 19187c46 03-Apr-2012 Yongcong Du <ycdu.vmcore@gmail.com>

x86: Initialize IA32_MSR_ENERGY_PERF_BIAS

The lowest 4 bits of the MSR serves as a hint to the hardware to
favor performance or energy saving. 0 means a hint preference for
highest performance while 15 corresponds to the maximum energy
savings. A value of 7 translates into a hint to balance performance
with energy savings.

The default reset value of the MSR is 0. If BIOS doesn't intialize
the MSR, the hardware will run in performance state. This patch
initialize the MSR with value of 7 for balance between performance
and energy savings

Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>


# d2a1be1c 18-Aug-2012 Alex Smith <alex@alex-smith.me.uk>

Cleaner separation of 32-/64-bit specific CPU/interrupt code.

Renamed {32,64}/int.cpp to {32,64}/descriptors.cpp, which now contain
functions for GDT and TSS setup that were previously in arch_cpu.cpp,
as well as the IDT setup code. These get called from the init functions
in arch_cpu.cpp, rather than having a bunch of ifdef'd chunks of code
for 32/64.


# 8a190335 07-Aug-2012 Alex Smith <alex@alex-smith.me.uk>

Implemented user debugging support for x86_64.

Reused x86 arch_user_debugger.cpp, with a few minor changes to make
the code work for both 32 and 64 bit. Something isn't quite working
right, if a breakpoint is hit the kernel will hang. Other than that
everything appears to work correctly.


# 370ab57d 23-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Initial userland support for x86_64.

Userland switch is implemented, as is basic system call support (using
SYSCALL/SYSRET). The system call handler is not yet complete: it doesn't
handle more than 6 arguments, and does not perform all the necessary kernel
entry/exit work (neither does the interrupt handler). However, this is
sufficient for runtime_loader to start and print some debug output.


# 6497f6b1 21-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Moved the exception handling functions to arch_int.cpp, shared between x86 and x86_64.


# 5670b0a8 09-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Moved the 32-bit page fault handler to arch_int.cpp, use it for x86_64.

A proper page fault handler was required for areas that were not locked
into the kernel address space. This enables the boot process to get
up to the point of trying to find the boot volume.


# b5c9d24a 09-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Implemented threading for x86_64.

* Thread creation and switching is working fine, however threads do not yet
get interrupted because I've not implemented hardware interrupt handling
yet (I'll do that next).
* I've made some changes to struct iframe: I've removed the e/r prefixes
from the member names for both 32/64, so now they're just named ip, ax,
bp, etc. This makes it easier to write code that works with both 32/64
without having to deal with different iframe member names.


# 5e9bb17d 08-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Renamed remaining i386_* functions to x86_* for consistency.


# 5c7d5218 08-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Implemented system_time() for x86_64.

* Uses 64-bit multiplication, special handling for CPUs clocked < 1 GHz
in system_time_nsecs() not required like on x86.
* Tested against a straight conversion of the x86 version, noticably
faster with a large number of system_time() calls.


# 4304bb98 04-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Added arch_cpu.cpp to the x86_64 build.

* Some things are currently ifndef'd out completely for x86_64 because
they aren't implemented, there's a few other ifdef's to handle x86_64
differences but most of the code works unchanged.
* Renamed some i386_* functions to x86_*.
* Added a temporary method for setting the current thread on x86_64
(a global variable, not SMP safe). This will be changed to be done
via the GS segment but I've not implemented that yet.


# 4e8fbfb2 03-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

x86_{read,write}_cr{0,4} can just be implemented as macros, put an x86_ prefix on the other read/write macros for consistency.


# 0897e314 02-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Merged x86_64 headers into x86 headers.

Not many changes seeing as there's not much x86_64 stuff done yet. Small
differences are handled with ifdefs, large differences (descriptors.h,
struct iframe) have separate headers under arch/x86/32 and arch/x86/64.


# 3403f23e 27-Jun-2012 Alex Smith <alex@alex-smith.me.uk>

Moved the common parts of arch_cpu.h between x86 and x86_64 to arch/common_x86/cpu.h.


# 45cf3294 03-Apr-2012 Yongcong Du <ycdu.vmcore@gmail.com>

x86: add cpuid feature 6 flags

Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>


# cc586f16 07-Apr-2012 Yongcong Du <ycdu.vmcore@gmail.com>

x86: AMD C1E with no ARAT(Always Running APIC Timer) idle support

AMD C1E is a BIOS controlled C3 state. Certain processors families
may cut off TSC and the lapic timer when it is in a deep C state,
including C1E state, thus the cpu can't be waken up and system will hang.

This patch firstly adds the support of idle selection during boot. Then
it implements amdc1e_noarat_idle() routine which checks the MSR which
contains the C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27) before
executing the halt instruction, then clear them once set.

However intel C1E doesn't has such problem. AMD C1E is a BIOS controlled
C3 state. The difference between C1E and C3 is that transition into C1E
is not initiated by the operating system. System will enter C1E state
automatically when both cores enters C1 state. As for intel C1E, it
means "reduce CPU voltage before entering corresponding Cx-state".

This patch may fix #8111, #3999, #7562, #7940 and #8060

Copied from the description of #3999:
>but for some reason I hit the power button instead of the reset one. And
>the boot continued!!
The reason is CPUs are waken up once power button is hit.

Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>


# d387f54a 09-Apr-2012 Alexander von Gluck IV <kallisti5@unixzen.com>

x86: Change cpu feature flags to shifts

* No functional change
* Added missing ia64 emulation flag
* More closely matches AMD_EXT defines
* Easier to read compared to CPU documentation


# 3f1eed70 14-Feb-2012 Alexander von Gluck IV <kallisti5@unixzen.com>

kernel: x86 SSE improvements

* Prepend x86_ to non-static x86 code
* Add x86_init_fpu function to kernel header
* Don't init fpu multiple times on smp systems
* Verified fpu is still started on smp and non-smp
* SSE code still generates general protection faults
on smp systems though


# 8dd1e875 20-Jan-2012 Alexander von Gluck IV <kallisti5@unixzen.com>

kernel: Fix FPU SSE + MMX instruction usage.

* Rename init_sse to init_fpu and handle FPU setup.
* Stop trying to set up FPU before VM init.
We tried to set up the FPU before VM init, then
set it up again after VM init with SSE extensions,
this caused SSE and MMX applications to crash.
* Be more logical in FPU setup by detecting CPU flag prior
to enabling FPU. (it's unlikely Haiku will run on
a processor without a fpu... but lets be consistant)
* SSE2 gcc code now runs (faster even) without GPF
* tqh confirms his previously crashing mmx code now works
* The non-SSE FPU enable after VM init needs tested!


# 11977ba8 20-Jun-2011 Jérôme Duval <korli@users.berlios.de>

added more cpu feature flags for x86


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42263 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 24df6592 11-Jun-2011 Ingo Weinhold <ingo_weinhold@gmx.de>

Merged signals-merge branch into trunk with the following changes:
* Reorganized the kernel locking related to threads and teams.
* We now discriminate correctly between process and thread signals. Signal
handlers have been moved to teams. Fixes #5679.
* Implemented real-time signal support, including signal queuing, SA_SIGINFO
support, sigqueue(), sigwaitinfo(), sigtimedwait(), waitid(), and the addition
of the real-time signal range. Closes #1935 and #2695.
* Gave SIGBUS a separate signal number. Fixes #6704.
* Implemented <time.h> clock and timer support, and fixed/completed alarm() and
[set]itimer(). Closes #5682.
* Implemented support for thread cancellation. Closes #5686.
* Moved send_signal() from <signal.h> to <OS.h>. Fixes #7554.
* Lots over smaller more or less related changes.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42116 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 9e101ddf 09-Jun-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

Definition for CR4 PAE bit.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37073 a95241bf-73f2-0310-859d-f6bbb57e9c96


# c3e021e8 05-Jun-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

x86:
* Renamed i386_context_switch() to x86_context_switch().
* x86_context_switch() no longer sets the page directory.
arch_thread_context_switch() does that explicitly, now. This allows to solve
the TODO by reordering releasing the previous paging structures reference and
setting the new page directory.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37024 a95241bf-73f2-0310-859d-f6bbb57e9c96


# fabdf00e 05-Jun-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

Renamed i386_swap_pgdir() to x86_swap_pgdir.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37023 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 84217140 05-Jun-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

x86:
* Renamed vm_translation_map_arch_info to X86PagingStructures, and all
members and local variables of that type accordingly.
* arch_thread_context_switch(): Added TODO: The still active paging structures
can indeed be deleted before we stop using them.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37022 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 147133b7 25-May-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

* First run through the kernel's private parts to use phys_{addr,size}_t
where appropriate.
* Typedef'ed page_num_t to phys_addr_t and used it in more places in
vm_page.{h,cpp}.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36937 a95241bf-73f2-0310-859d-f6bbb57e9c96


# feddedab 25-Mar-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

x86:
Added fields for temporary storage of the debug registers dr6 and dr7 to the
arch_cpu_info structure. The actual registers are stored at the beginning of
x86_exit_user_debug_at_kernel_entry() and read in
x86_handle_debug_exception().
The problem was that x86_exit_user_debug_at_kernel_entry() itself overwrote
dr7 and, if kernel breakpoints were enabled, dr6 could be overwritten anytime
after. So x86_handle_debug_exception() would find incorrect values in the
registers (definitely in dr7) and thus interpret the detected debug condition
incorrectly. Usually watchpoints were recognized as breakpoints.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35951 a95241bf-73f2-0310-859d-f6bbb57e9c96


# dac21d8b 18-Feb-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

* map_physical_memory() does now always set a memory type. If none is given (it
needs to be or'ed to the address specification), "uncached" is assumed.
* Set the memory type for the "BIOS" and "DMA" areas to write-back. Not sure, if
that's correct, but that's what was effectively used on my machines before.
* Changed x86_set_mtrrs() and the CPU module hook to also set the default memory
type.
* Rewrote the MTRR computation once more:
- Now we know all used memory ranges, so we are free to extend used ranges
into unused ones in order to simplify them for MTRR setup.
- Leverage the subtractive properties of uncached and write-through ranges to
simplify ranges of any other respectively write-back type.
- Set the default memory type to write-back, so we don't need MTRRs for the
RAM ranges.
- If a new range intersects with an existing one, we no longer just fail.
Instead we use the strictest requirements implied by the ranges. This fixes
#5383.

Overall the new algorithm should be sufficient with far less MTRRs than before
(on my desktop machine 4 are used at maximum, while 8 didn't quite suffice
before). A drawback of the current implementation is that it doesn't deal with
the case of running out of MTRRs at all, which might result in some ranges
having weaker caching/memory ordering properties than requested.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35515 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 924a3e5f 09-Jan-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

Removed unused <arch>_switch_stack_and_call() and
arch_thread_switch_kstack_and_call().


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34971 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 34a48c70 07-Dec-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

Added type nanotime_t (an int64 storing a nanoseconds value) and function
system_time_nsecs(), returning the system time in nanoseconds. The function
is only really implemented for x86. For the other architectures
system_time() * 1000 is returned.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34543 a95241bf-73f2-0310-859d-f6bbb57e9c96


# bb163c02 23-Nov-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

* Added a set_mtrrs() hook to x86_cpu_module_info, which is supposed to set
all MTRRs at once.
* Added a respective x86_set_mtrrs() kernel function.
* x86 CPU module:
- Implemented the new hook.
- Prefixed most debug output with the CPU index. Otherwise it gets quite
confusing with multiple CPUs.
- generic_init_mtrrs(): No longer clear all MTRRs, if they are already
enabled. This lets us benefit from the BIOS's setup until we install our
own -- otherwise with caching disabled things are *really* slow.
* arch_vm.cpp: Completely rewrote the MTRR handling as the old one was not
only slow (O(2^n)), but also broken (resulting in incorrect setups (e.g.
with cachable ranges larger than requested)), and not working by design for
certain cases (subtractive setups intersecting ranges added later).
Now we maintain an array with the successfully set ranges. When a new range
is added, we recompute the complete MTRR setup as we need to. The new
algorithm analyzing the ranges has linear complexity and also handles range
base addresses with an alignment not matching the range size (e.g. a range
at address 0x1000 with size 0x2000) and joining of adjacent/overlapping
ranges of the same type.

This fixes the slow graphics on my 4 GB machine (though unfortunately the
8 MTRRs aren't enough to fully cover the complete frame buffer (about 35
pixel lines remain uncachable), but that can't be helped without rounding up
the frame buffer size, for which we don't have enough information). It might
also fix #1823.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34197 a95241bf-73f2-0310-859d-f6bbb57e9c96


# d337132b 27-Oct-2009 Axel Dörfler <axeld@pinc-software.de>

* Coding style cleanup, no functional change.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33792 a95241bf-73f2-0310-859d-f6bbb57e9c96


# ea2abd11 02-Aug-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

* Renamed the ROUNDOWN macro to ROUNDDOWN. Also changed the implementation of
ROUNDUP to use '*' and '/' -- the compiler will optimize that for powers of
two anyway and this implementation works for other numbers as well.
* The thread::fault_handler use in C[++] code was broken with gcc 4. At least
when other functions were invoked. Trying to trick the compiler wasn't a
particularly good idea anyway, since the next compiler version could break
the trick again. So the general policy is to use the fault handlers only in
assembly code where we have full control. Changed that for x86 (save for the
vm86 mode, which has a similar mechanism), but not for the other
architectures.
* Introduced fault_handler, fault_handler_stack_pointer, and fault_jump_buffer
fields in the cpu_ent structure, which must be used instead of
thread::fault_handler in the kernel debugger. Consequently user_memcpy() must
not be used in the kernel debugger either. Introduced a debug_memcpy()
instead.
* Introduced debug_call_with_fault_handler() function which calls a function
in a setjmp() and fault handler context. The architecture specific backend
arch_debug_call_with_fault_handler() has only been implemented for x86 yet.
* Introduced debug_is_kernel_memory_accessible() for use in the kernel
debugger. It determines whether a range of memory can be accessed in the
way specified. The architecture specific back end
arch_vm_translation_map_is_kernel_page_accessible() has only been implemented
for x86 yet.
* Added arch_debug_unset_current_thread() (only implemented for x86) to unset
the current thread pointer in the kernel debugger. When entering the kernel
debugger we do some basic sanity checks of the currently set thread structure
and unset it, if they fail. This allows certain commands (most importantly
the stack trace command) to avoid accessing the thread structure.
* x86: When handling a double fault, we do now install a special handler for
page faults. This allows us to gracefully catch faulting commands, even if
e.g. the thread structure is toast.

We are now in much better shape to deal with double faults. Hopefully avoiding
the triple faults that some people have been experiencing on their hardware
and ideally even allowing to use the kernel debugger normally.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32073 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 671a2442 31-Jul-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

More work towards making our double fault handler less triple fault prone:
* SMP:
- Added smp_send_broadcast_ici_interrupts_disabled(), which is basically
equivalent to smp_send_broadcast_ici(), but is only called with interrupts
disabled and gets the CPU index, so it doesn't have to use
smp_get_current_cpu() (which dereferences the current thread).
- Added cpu index parameter to smp_intercpu_int_handler().
* x86:
- arch_int.c -> arch_int.cpp
- Set up an IDT per CPU. We were using a single IDT for all CPUs, but that
can't work, since we need different tasks for the double fault interrupt
vector.
- Set the per CPU double fault task gates correctly.
- Renamed set_intr_gate() to set_interrupt_gate and set_system_gate() to
set_trap_gate() and documented them a bit.
- Renamed double_fault_exception() x86_double_fault_exception() and fixed
it not to use smp_get_current_cpu(). Instead we have the new
x86_double_fault_get_cpu() that deducts the CPU index from the used stack.
- Fixed the double_fault interrupt handler: It no longer calls int_bottom to
avoid accessing the current thread.
* debug.cpp:
- Introduced explicit debug_double_fault() to enter the kernel debugger from
a double fault handler.
- Avoid using smp_get_current_cpu().
- Don't use kprintf() before sDebuggerOnCPU is set. Otherwise
acquire_spinlock() is invoked by arch_debug_serial_puts().

Things look a bit better when the current thread pointer is broken -- we run
into kernel_debugger_loop() and successfully print the "Welcome to KDL"
message -- but we still dereference the thread pointer afterwards, so that we
don't get a usable kernel debugger yet.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32050 a95241bf-73f2-0310-859d-f6bbb57e9c96


# cc77aba1 31-Jul-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

* Allocate a separate double fault stack for each CPU.
* Added x86_double_fault_get_cpu(), a save way to get the CPU index when in
the double fault handler. smp_get_current_cpu() requires at least a somewhat
intact thread structure, so we rather want to avoid it when handling a double
fault. There are a lot more of those dependencies in the KDL entry code.
Working on it...


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32028 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 8b3b05cb 20-Apr-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

Synchronize the TSCs of all CPUs early in the boot process, so system_time()
will return consistent values. This helps with debug measurements for the time
being. Obviously we'll have to think of something different when we support
speed-stepping on models with frequency-dependent TSCs.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@30287 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 9a42ad7a 22-Oct-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

When switching to a kernel thread we no longer set the page directory.
This is not necessary, since userland teams' page directories also
contain the kernel mappings, and avoids unnecessary TLB flushes. To make
that possible the vm_translation_map_arch_info objects are reference
counted now.

This optimization reduces the kernel time of the Haiku build on my
machine with SMP disabled a few percent, but interestingly the total
time decreases only marginally. Haven't tested with SMP yet, but for
full impact CPU affinity would be needed.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@28287 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 78c90d44 17-Oct-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

Moved definition of the PAUSE macro to <cpu.h>, respectively
<arch/cpu.h>.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@28221 a95241bf-73f2-0310-859d-f6bbb57e9c96


# b18c9b97 10-Oct-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

* Implemented x86 assembly version of memset().
* memset() is now available through the commpage.
* CPU modules can provide a model-optimized memset().


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@27952 a95241bf-73f2-0310-859d-f6bbb57e9c96


# cb387cfb 10-Sep-2008 Axel Dörfler <axeld@pinc-software.de>

* Added acpi_shutdown() method. If the ACPI bus manager is installed, this will
be used now. Tested only with VMware so far.
* apm_shutdown() is now called with interrupts turned on.
* Renamed arch_cpu.c to arch_cpu.cpp.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@27404 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 783c4e20 04-Aug-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

Added comment.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26806 a95241bf-73f2-0310-859d-f6bbb57e9c96


# bca3215f 03-Aug-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

* Introduced x86_get_double_fault_stack(), which returns the address
and size of the double fault stack.
* is_kernel_stack_address() does now also check whether the given
address is on the double fault stack. This fixes stack traces on
double faults, which were broken (i.e. went only to the double fault
iframe) since we started checking whether the addresses are on the
kernel stack at all.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26775 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 011d7162 02-Aug-2008 Axel Dörfler <axeld@pinc-software.de>

* Removed the feature_string from the cpu_ent structure.
* Dumping the features as string is now a one time thing, that only happens
when DUMP_FEATURE_STRING is defined to 1.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26733 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 15173df4 22-May-2008 Axel Dörfler <axeld@pinc-software.de>

Last patch of the vm86 patch series from Jan Klötzke - thanks!:
* The new function vm86_do_int(struct vm86_state *state, uint8 vec) provides a
facility to call BIOS interupt handlers. The function must only be called from
a user thread context because the lower 1MB of the address space is used.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25610 a95241bf-73f2-0310-859d-f6bbb57e9c96


# bb107c4e 22-May-2008 Axel Dörfler <axeld@pinc-software.de>

Patch by Jan Klötzke:
* In vm86 mode CS will have arbitrary values so we check for both USER_CODE_SEG
and the VM flag in EFLAGS. This is also done when entering interrupt gates.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25607 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7a66a9b8 21-Mar-2008 Bruno G. Albuquerque <bga@bug-br.org.br>

- Added support in system info for extended cpu family and model.
- Take extended family and model into account when generating the cpu
type and revision.
- Added Intel Core 2 Extreme to the cpu list.

Please review.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@24509 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 34b3b26b 10-Jan-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

Merged branch haiku/branches/developer/bonefish/optimization revision
23139 into trunk, with roughly the following changes (for details svn
log the branch):
* The int 99 syscall handler is now fully in assembly.
* Added a sysenter/sysexit handler and use it on Pentiums that support
it (via commpage).
* Got rid of i386_handle_trap(). A bit of functionality was moved into
the assembly handler which now uses a jump table to call C functions
handling the respective interrupt.
* Some optimizations to get user debugger support code out of the
interrupt handling path.
* Introduced a thread::flags fields which allows to skip handling of
rare events (signals, user debug enabling/disabling) on the
common interrupt handling path.
* Got rid of the explicit iframe stack. The iframes can still be
retrieved by iterating through the stack frames.
* Made the commpage an architecture independent feature. It's used for
the real time data stuff (instead of creating a separate area).
* The x86 CPU modules can now provide processor optimized versions for
common functions (currently memcpy() only). They are used in the
kernel and are provided to the userland via commpage entries.
* Introduced build system feature allowing easy use of C structure
member offsets in assembly code.

Changes after merging:
* Fixed merge conflict in src/system/kernel/arch/x86/arch_debug.cpp
(caused by refactoring and introduction of "call" debugger command).



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23370 a95241bf-73f2-0310-859d-f6bbb57e9c96


# dfb5375d 13-Feb-2007 Travis Geiselbrecht <geist@foobox.com>

clean up TSS initialization.

Now two complete tss structures exist within the per-cpu structure. Instead
of having to create a seperate area per each one, initialize them in place.
Also, the old mechanism to getting all of the cpus to get initialized was
subtly broken, but still managed to work. Now, just force all the cpus to
initialize at boot, which makes the actual swapping of esp0 somewhat simpler.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@20131 a95241bf-73f2-0310-859d-f6bbb57e9c96


# dcdc4f4b 04-Feb-2007 Travis Geiselbrecht <geist@foobox.com>

pulled over some stuff from newos:
at boot, per cpu, detect the cpu, pull down all the relevant cpuid bits and
save them into the per-cpu structure. Changed most of the code scattered here
and there that reads the cpuid to use a new api, x86_check_feature, which looks
at the saved bits.
Also changed the system_info stuff to read from these bits.
While i was at it, refreshed all the bits to be current.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@20072 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 9ecaa867 22-Jan-2007 Axel Dörfler <axeld@pinc-software.de>

Applied patch by Vasilis Kaoutsis: now checks for the MSR feature as well; obviously
some Pentium 200 MMX pretend to support MTRRs.
This should fix bug #553.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@19899 a95241bf-73f2-0310-859d-f6bbb57e9c96


# fa4858af 12-Jan-2007 Axel Dörfler <axeld@pinc-software.de>

Didn't notice that x86_enter_userspace() also copied the thread entry's arguments to
the userland stack in an unsafe way - moved that stuff to arch_thread_enter_userspace(), too.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@19778 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 8fc075ac 12-Jan-2007 Axel Dörfler <axeld@pinc-software.de>

* There was no reason to copy the "userland calls exit_thread()" stub with interrupts
turned off - accessing userland memory. Now, arch_thread_enter_userspace() does that
job, and as a result, may also fail.
* dump_thread() now directly prints the info of the current thread when used without
argument (rather than iterating the thread list to look for the current thread).
* If arch_thread_init_tls() fails upon thread creation, the function will now return
an error.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@19775 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 2a03240e 29-Apr-2006 Michael Lotz <mmlr@mlotz.ch>

Reverted my last change as it turned out that the lazy FPU state handling was not SMP safe afterall and the performance gain is questionable. Maybe it'll be implemented correctly in the future. Sorry for any inconvenience this may have cost.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17272 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7eee76e6 27-Apr-2006 Michael Lotz <mmlr@mlotz.ch>

Implemented lazy FPU state save/restore. In the end mostly ported from NewOS. SMP safe.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17251 a95241bf-73f2-0310-859d-f6bbb57e9c96


# f94b06f9 02-Mar-2006 Axel Dörfler <axeld@pinc-software.de>

Implemented SSE2/3 support (tested with VLC).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@16569 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 09bb4e9a 03-Jan-2006 Ingo Weinhold <ingo_weinhold@gmx.de>

The real_time_data structure contains an architecture specific
substructure now (that's the only member actually). The system time
offset is therefore accessed via architecture specific accessor
functions.
Note, that this commit breaks the PPC build. Since I want to rename at
least one file I've already changed, I can't avoid that.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15835 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7d7f4675 15-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

* Added some cpuid eax == 1 feature definitions to arch_cpu.h
* Renamed IA32_MTR_WRITE_COMBINED to IA32_MTR_WRITE_COMBINING.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15559 a95241bf-73f2-0310-859d-f6bbb57e9c96


# e0e9a3e6 14-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

* We now support the global page feature of x86 processors that prevents
kernel TLBs from being flushed on context switch.
* new arch_cpu_user_TLB_invalidate() that now does what arch_cpu_global_TLB_invalidate()
did before.
* arch_cpu_global_TLB_invalidate() will now flush all TLBs, even those from the
kernel.
* some cleanups.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15535 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 51a3c450 13-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

The short story: we now have MTRR support on Intel and AMD CPUs (the latter
has not yet been tested, though - I'll do this after this commit):
* Removed the arch_memory_type stuff from vm_area; since there are only 8 memory
ranges on x86, it's simply overkill. The MTRR code now remembers the area ID
and finds the MTRR that way (it could also iterate over the existing MTRRs).
* Introduced some post_modules() init functions.
* If the other x86 CPUs out there don't differ a lot, MTRR functionality might
be put back into the kernel.
* x86_write_msr() was broken, it wrote the 64 bit number with the 32 bit words
switched - it took me some time (and lots of #GPs) to figure that one out.
* Removed the macro read_ebp() and introduced a function x86_read_ebp()
(it's not really a time critical call).
* Followed the Intel docs on how to change MTRRs (symmetrically on all CPUs
with caches turned off).
* Asking for memory types will automatically change the requested length to
a power of two - note that BeOS seems to behave in the same, although that's
not really very clean.
* fixed MTRRs are ignored for now - we should make sure at least, though,
that they are identical on all CPUs (or turn them off, even though I'd
prefer the BIOS stuff to be uncacheable, which we don't enforce yet, though).



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15528 a95241bf-73f2-0310-859d-f6bbb57e9c96


# d49423ae 12-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

Added a wbinvd() macro.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15526 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 2ed21b85 12-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

Some work in progress of the MTRR support. Shouldn't do any harm yet :-)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15525 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7c0a9357 12-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

Preparation for MTRR support, code is completely untested, though.
The CPU specific MTRR code will be in modules.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15520 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7b7c38a2 04-Nov-2005 Axel Dörfler <axeld@pinc-software.de>

The "where" or "sc" command now switches the page directory to the specified thread
to be able to follow the stack trace into userland.
No symbols there, yet, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@14697 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 90ce9e83 26-Oct-2005 Axel Dörfler <axeld@pinc-software.de>

Added calls to read and write the MSR, the machine state register.
Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@14537 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 8e26b085 04-Apr-2005 Ingo Weinhold <ingo_weinhold@gmx.de>

Fixed double fault handler. Personally I disclaim all responsiblity
for these changes. I was mostly just staring in amazement at the screen
while Axel and Thomas were discussing IA32 internals. A particularly
fascinating moment was when Thomas produced the cause of a bug we had
been trying to track down for hours off the top of his head (of course
iret behaves specially when the NT bit is set :-). His slowness must be
excused though, since he hadn't slept for more then 30 hours. ;-)

The code doesn't wholeheartedly deal with multi-processor machines yet.
Axel will certainly do some cleanup...


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@12239 a95241bf-73f2-0310-859d-f6bbb57e9c96


# edb55663 04-Apr-2005 Axel Dörfler <axeld@pinc-software.de>

Fixed struct tss; there is no ss3/sp3.
Moved ptentry/pdentry to arch_vm_translation_map.c and renamed them to
page_table_entry and page_directory_entry.
Fixed a race condition that happened when memory was remapped (which
can currently happen because lock_memory() does not work correctly, and
there might be other conditions as well, like certain vm_store fault
handlers). Now, page table and directory entries are updated atomically.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@12229 a95241bf-73f2-0310-859d-f6bbb57e9c96


# c8d7534e 01-Mar-2005 Ingo Weinhold <ingo_weinhold@gmx.de>

* Made C++ save.
* Made the parameter for restoring the FPU state const.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@11522 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 98dbeb36 24-Feb-2005 Ingo Weinhold <ingo_weinhold@gmx.de>

Added note to keep struct iframe in sync with the struct cpu_state.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@11471 a95241bf-73f2-0310-859d-f6bbb57e9c96


# c2c20b78 13-Dec-2004 Axel Dörfler <axeld@pinc-software.de>

Incorporated some code from NewOS to set up a double fault handler.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@10444 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 6a689590 19-Nov-2004 Axel Dörfler <axeld@pinc-software.de>

Removed unneeded includes of ktypes.h.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@10036 a95241bf-73f2-0310-859d-f6bbb57e9c96


# afad65de 19-Oct-2004 Axel Dörfler <axeld@pinc-software.de>

Replaced all remaining PAGE_SIZE with B_PAGE_SIZE, addr with addr_t.
Removed the definition of PAGE_SIZE and addr.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@9433 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 3490a4be 11-Oct-2004 Axel Dörfler <axeld@pinc-software.de>

No longer needs the arch_thread.h header.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@9293 a95241bf-73f2-0310-859d-f6bbb57e9c96


# c2d416e2 10-Sep-2004 Axel Dörfler <axeld@pinc-software.de>

Partially covered by arch_config.h and support/ByteOrder.h now/already.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8900 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 75df1437 01-Sep-2004 Ingo Weinhold <ingo_weinhold@gmx.de>

Introduced a macro specifying the type function parameters are aligned to. Not nice, but seems to help with the automatic generation of syscall code (at least on x86).


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8783 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 5fe840b9 21-Aug-2003 beveloper <beveloper@nowhere.fake>

fixed address checking in ppc atomic functions.
fixed compilation on x86.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@4361 a95241bf-73f2-0310-859d-f6bbb57e9c96


# ff6ff33a 19-May-2003 Axel Dörfler <axeld@pinc-software.de>

Put spaces between "::" in the asm directive to let it compile in C++ mode.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@3262 a95241bf-73f2-0310-859d-f6bbb57e9c96


# a02a5888 18-Apr-2003 Axel Dörfler <axeld@pinc-software.de>

Added another argument parameter for the thread creation code. Helps
implementing a more efficient on_exit_thread().


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@3073 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 074a16b5 07-Jan-2003 Axel Dörfler <axeld@pinc-software.de>

Added a private tls.h file with definitions for the reserved TLS slots.
Renamed i386_set_kstack() to i386_set_tss_and_kstack(), because that's what
it does.
Added a new function arch_thread_init_tls() which must be called after
having allocated the TLS area.
Renamed arch_thread_initialize_kthread_stack() to arch_thread_init_kthread_stack()
to be more consistent.
Changed the parameters for arch_thread_enter_uspace() - it now gets a pointer
to the thread structure and takes the user stack pointer from there (which
might also be architectural different).


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@2379 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7208e95f 06-Jan-2003 Axel Dörfler <axeld@pinc-software.de>

Moved the gdt_idt_descr struct from arch_stage2.h to stage2_priv.h.
Moved the tss_descriptor structure to descriptor.h, updated it to be a
segment_descriptor structure, and provided inlines for set_tss_descriptor(),
set_segment_descriptor(), set_segment_descriptor_base(), and
clear_segment_descriptor().
Also added defines for the different privilege levels and descriptor types.
Removed the unusused and incorrect TSS definition, introduced new
TSS_BASE_SEGMENT and TLS_BASE_SEGMENT macros.
Removed include of arch/cpu.h in arch_cpu.h.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@2360 a95241bf-73f2-0310-859d-f6bbb57e9c96


# f510e6ce 23-Oct-2002 lillo <lillo@nowhere.fake>

posix signals support, 1st pass


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@1623 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 5ca8da7a 13-Aug-2002 Axel Dörfler <axeld@pinc-software.de>

Backported the new stack crawl command ("sc", not "bt" like in NewOS) from
NewOS. Untested yet, though.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@750 a95241bf-73f2-0310-859d-f6bbb57e9c96


# fde77afb 24-Jul-2002 notion <notion@nowhere.fake>

Ported my NewOS changes to OpenBeOS.

A couple of changes in various interrupt and thread functions and structures.
These make it now possible to change the stack at any time without making the kernel crash. This is needed for calling VESA 3.0 VBE functions through the protected mode interface.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@422 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 52a38012 08-Jul-2002 ejakowatz <ejakowatz@nowhere.fake>

It is accomplished ...


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@10 a95241bf-73f2-0310-859d-f6bbb57e9c96


# d6aaebc757c64934c119575903587b0c3678df30 23-Dec-2014 Jérôme Duval <jerome.duval@gmail.com>

x86: added two MSR definitions.


# 396b74228eefcf4bc21333e05c1909b8692d1b86 10-Sep-2014 Paweł Dziepak <pdziepak@quarnos.org>

kernel/x86_64: save fpu state at interrupts

The kernel is allowed to use fpu anywhere so we must make sure that
user state is not clobbered by saving fpu state at interrupt entry.
There is no need to do that in case of system calls since all fpu
data registers are caller saved.

We do not need, though, to save the whole fpu state at task swich
(again, thanks to calling convention). Only status and control
registers are preserved. This patch actually adds xmm0-15 register
to clobber list of task swich code, but the only reason of that is
to make sure that nothing bad happens inside the function that
executes that task swich. Inspection of the generated code shows
that no xmm registers are actually saved.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>


# b41f281071b84235ea911f1e02123692798f706d 06-Sep-2014 Paweł Dziepak <pdziepak@quarnos.org>

boot/x86_64: enable sse early

Enable SSE as a part of the "preparation of the environment to run any
C or C++ code" in the entry points of stage2 bootloader.

SSE2 is going to be used by memset() and memcpy().

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>


# 6156a508adb812153113f01aa1e547fff1e41bdb 06-Sep-2014 Paweł Dziepak <pdziepak@quarnos.org>

kernel/x86[_64]: remove get_optimized_functions from cpu modules

The possibility to specify custom memcpy and memset implementations
in cpu modules is currently unused and there is generally no point
in such feature.

There are only 2 x86 vendors that really matter and there isn't
very big difference in performance of the generic optmized versions
of these funcions across different models. Even if we wanted different
versions of memset and memcpy depending on the processor model or
features much better solution would be to use STT_GNU_IFUNC and save
one indirect call.

Long story short, we don't really benefit in any way from
get_optimized_functions and the feature it implements and it only adds
unnecessary complexity to the code.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>


# 4b75a1e2377d5380d6bea4319fc8f1bc2f595665 25-Aug-2014 Paweł Dziepak <pdziepak@quarnos.org>

kernel/x86_64: implement x86_swap_pgdir in C++

No reason not to inline this function.

Signed-off-by: Paweł Dziepak <pdziepak@quarnos.org>


# 76636769bd9a53acbf21bbfd411f731d2ab51e49 06-May-2014 Pawel Dziepak <pdziepak@quarnos.org>

kernel/x86_64: inline x86_{read, write}_msr()

This patch makes it possible to inline rdmsr and wrmsr instruction. The
performance impact shouldn't be significant since they are used relatively
rarely and wrmsr is usually a serializing instruction, but there is no reason
not to do so.


# 88e8e24c84aded0ff085aa93402c71862c5e4fe0 06-May-2014 Pawel Dziepak <pdziepak@quarnos.org>

kernel/x86_64: improve context switch implementation

The goal of this patch is to amortize the cost of context switch by making
the compiler aware that context switch clobbers all registers. Because all
register need to be saved anyway there is no additional cost of using
callee saved register in the function that does the context switch.


# e3d001ff02e087a2392c2c46a7ac2d78d3bc12f6 19-Dec-2013 Pawel Dziepak <pdziepak@quarnos.org>

x86: Implement multicast ICIs


# 611376fef7e00967fb65342802ba668a807348d5 16-Dec-2013 Pawel Dziepak <pdziepak@quarnos.org>

x86: Let each CPU have its own GDT


# 3514fd77f702359e815201419aebded48f032ad8 28-Nov-2013 Pawel Dziepak <pdziepak@quarnos.org>

kernel: Reduce lock contention when processing ICIs


# 7db89e8dc395db73368479fd9817b2b67899f3f6 25-Nov-2013 Pawel Dziepak <pdziepak@quarnos.org>

kernel: Rework cpuidle module

* Create new interface for cpuidle modules (similar to the cpufreq
interface)
* Generic cpuidle module is no longer needed
* Fix and update Intel C-State module


# 0e94a12f8e0e5fe5ff5b2e3f83384f3586396c92 24-Nov-2013 Pawel Dziepak <pdziepak@quarnos.org>

kernel: Make CACHE_LINE_ALIGN visible in the whole kernel


# 9c0ff0eed12150e4b27b266af581b7d4758019a3 29-Oct-2013 Pawel Dziepak <pdziepak@quarnos.org>

kernel: Add cpufreq module for Intel P-states

Since Sandy Bridge managing P-states on Intel processors is much easier
and more powerful than when using previous versions of EIST.


# 36cc64a9b3f1744e7a030248bb81526e9f37f3d6 02-Oct-2013 Pawel Dziepak <pdziepak@quarnos.org>

x86[_64]: Add CPU cache topology detection for AMD and Intel CPUs


# 787773400ce9ee4ce71d9255e1be8fac66584615 26-Aug-2013 Jérôme Duval <jerome.duval@gmail.com>

Added x2APIC support.

* Mostly useful for virtualization at the moment. Works in QEmu.
* Can be enabled by safemode settings/menu.
* Please note that x2APIC normally requires use of VT-d interrupt remapping feature
on real hardware, which we don't support yet.


# 966f207668d19610dae34d5331150e3742815bcf 06-Mar-2013 Pawel Dziepak <pdziepak@quarnos.org>

x86: enable data execution prevention

Set execute disable bit for any page that belongs to area with neither
B_EXECUTE_AREA nor B_KERNEL_EXECUTE_AREA set.

In order to take advanage of NX bit in 32 bit protected mode PAE must be
enabled. Thus, from now on it is also enabled when the CPU supports NX bit.

vm_page_fault() takes additional argument which indicates whether page fault
was caused by an illegal instruction fetch.


# 19187c464b4598774f731cd015c4fbc893c25348 03-Apr-2012 Yongcong Du <ycdu.vmcore@gmail.com>

x86: Initialize IA32_MSR_ENERGY_PERF_BIAS

The lowest 4 bits of the MSR serves as a hint to the hardware to
favor performance or energy saving. 0 means a hint preference for
highest performance while 15 corresponds to the maximum energy
savings. A value of 7 translates into a hint to balance performance
with energy savings.

The default reset value of the MSR is 0. If BIOS doesn't intialize
the MSR, the hardware will run in performance state. This patch
initialize the MSR with value of 7 for balance between performance
and energy savings

Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>


# d2a1be1c4e4a8ae3879d7f59b07a6924c62b4b14 18-Aug-2012 Alex Smith <alex@alex-smith.me.uk>

Cleaner separation of 32-/64-bit specific CPU/interrupt code.

Renamed {32,64}/int.cpp to {32,64}/descriptors.cpp, which now contain
functions for GDT and TSS setup that were previously in arch_cpu.cpp,
as well as the IDT setup code. These get called from the init functions
in arch_cpu.cpp, rather than having a bunch of ifdef'd chunks of code
for 32/64.


# 8a1903353eedd95266c7241aada3a314c5d35a55 07-Aug-2012 Alex Smith <alex@alex-smith.me.uk>

Implemented user debugging support for x86_64.

Reused x86 arch_user_debugger.cpp, with a few minor changes to make
the code work for both 32 and 64 bit. Something isn't quite working
right, if a breakpoint is hit the kernel will hang. Other than that
everything appears to work correctly.


# 370ab57d49a208f79ce3c5e9f92be13b58c48f18 23-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Initial userland support for x86_64.

Userland switch is implemented, as is basic system call support (using
SYSCALL/SYSRET). The system call handler is not yet complete: it doesn't
handle more than 6 arguments, and does not perform all the necessary kernel
entry/exit work (neither does the interrupt handler). However, this is
sufficient for runtime_loader to start and print some debug output.


# 6497f6b1ec4dd21d85ec01a18098138b03986a98 21-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Moved the exception handling functions to arch_int.cpp, shared between x86 and x86_64.


# 5670b0a8e4fe8e5504b2e57a958e1590f6024406 09-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Moved the 32-bit page fault handler to arch_int.cpp, use it for x86_64.

A proper page fault handler was required for areas that were not locked
into the kernel address space. This enables the boot process to get
up to the point of trying to find the boot volume.


# b5c9d24abcc3599375153ed310b495ea944d46a0 09-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Implemented threading for x86_64.

* Thread creation and switching is working fine, however threads do not yet
get interrupted because I've not implemented hardware interrupt handling
yet (I'll do that next).
* I've made some changes to struct iframe: I've removed the e/r prefixes
from the member names for both 32/64, so now they're just named ip, ax,
bp, etc. This makes it easier to write code that works with both 32/64
without having to deal with different iframe member names.


# 5e9bb17da7b9cdd76ff9072486fab90688cf8c36 08-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Renamed remaining i386_* functions to x86_* for consistency.


# 5c7d52183c2182761151ba2f8f72bb7b39e50053 08-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Implemented system_time() for x86_64.

* Uses 64-bit multiplication, special handling for CPUs clocked < 1 GHz
in system_time_nsecs() not required like on x86.
* Tested against a straight conversion of the x86 version, noticably
faster with a large number of system_time() calls.


# 4304bb9894335fe5e5bd667a1f27dc7605c2e5b9 04-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Added arch_cpu.cpp to the x86_64 build.

* Some things are currently ifndef'd out completely for x86_64 because
they aren't implemented, there's a few other ifdef's to handle x86_64
differences but most of the code works unchanged.
* Renamed some i386_* functions to x86_*.
* Added a temporary method for setting the current thread on x86_64
(a global variable, not SMP safe). This will be changed to be done
via the GS segment but I've not implemented that yet.


# 4e8fbfb2d158de7b1cadd1c060acee51a7d67309 03-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

x86_{read,write}_cr{0,4} can just be implemented as macros, put an x86_ prefix on the other read/write macros for consistency.


# 0897e314b79d09b04349d3cfe6093a3fd6220da1 02-Jul-2012 Alex Smith <alex@alex-smith.me.uk>

Merged x86_64 headers into x86 headers.

Not many changes seeing as there's not much x86_64 stuff done yet. Small
differences are handled with ifdefs, large differences (descriptors.h,
struct iframe) have separate headers under arch/x86/32 and arch/x86/64.


# 3403f23e81b7bd6e50c459d01ae7238c1f3f5984 27-Jun-2012 Alex Smith <alex@alex-smith.me.uk>

Moved the common parts of arch_cpu.h between x86 and x86_64 to arch/common_x86/cpu.h.


# 45cf3294b25dfdc3444bb54983e03f0a43c0f51c 03-Apr-2012 Yongcong Du <ycdu.vmcore@gmail.com>

x86: add cpuid feature 6 flags

Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>


# cc586f1655b94c248be58ba1752b42bc39fbaf03 07-Apr-2012 Yongcong Du <ycdu.vmcore@gmail.com>

x86: AMD C1E with no ARAT(Always Running APIC Timer) idle support

AMD C1E is a BIOS controlled C3 state. Certain processors families
may cut off TSC and the lapic timer when it is in a deep C state,
including C1E state, thus the cpu can't be waken up and system will hang.

This patch firstly adds the support of idle selection during boot. Then
it implements amdc1e_noarat_idle() routine which checks the MSR which
contains the C1eOnCmpHalt (bit 28) and SmiOnCmpHalt (bit 27) before
executing the halt instruction, then clear them once set.

However intel C1E doesn't has such problem. AMD C1E is a BIOS controlled
C3 state. The difference between C1E and C3 is that transition into C1E
is not initiated by the operating system. System will enter C1E state
automatically when both cores enters C1 state. As for intel C1E, it
means "reduce CPU voltage before entering corresponding Cx-state".

This patch may fix #8111, #3999, #7562, #7940 and #8060

Copied from the description of #3999:
>but for some reason I hit the power button instead of the reset one. And
>the boot continued!!
The reason is CPUs are waken up once power button is hit.

Signed-off-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>


# d387f54a23bdee7d997eec60485a62484f614b26 09-Apr-2012 Alexander von Gluck IV <kallisti5@unixzen.com>

x86: Change cpu feature flags to shifts

* No functional change
* Added missing ia64 emulation flag
* More closely matches AMD_EXT defines
* Easier to read compared to CPU documentation


# 3f1eed704a8c799a40cc005bf4cb904463148d79 14-Feb-2012 Alexander von Gluck IV <kallisti5@unixzen.com>

kernel: x86 SSE improvements

* Prepend x86_ to non-static x86 code
* Add x86_init_fpu function to kernel header
* Don't init fpu multiple times on smp systems
* Verified fpu is still started on smp and non-smp
* SSE code still generates general protection faults
on smp systems though


# 8dd1e875c1d3735627166c6639078ae4419e7918 20-Jan-2012 Alexander von Gluck IV <kallisti5@unixzen.com>

kernel: Fix FPU SSE + MMX instruction usage.

* Rename init_sse to init_fpu and handle FPU setup.
* Stop trying to set up FPU before VM init.
We tried to set up the FPU before VM init, then
set it up again after VM init with SSE extensions,
this caused SSE and MMX applications to crash.
* Be more logical in FPU setup by detecting CPU flag prior
to enabling FPU. (it's unlikely Haiku will run on
a processor without a fpu... but lets be consistant)
* SSE2 gcc code now runs (faster even) without GPF
* tqh confirms his previously crashing mmx code now works
* The non-SSE FPU enable after VM init needs tested!


# 11977ba83b29ff77790cd7132980cc3d43d9b00e 20-Jun-2011 Jérôme Duval <korli@users.berlios.de>

added more cpu feature flags for x86


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42263 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 24df65921befcd0ad0c5c7866118f922da61cb96 11-Jun-2011 Ingo Weinhold <ingo_weinhold@gmx.de>

Merged signals-merge branch into trunk with the following changes:
* Reorganized the kernel locking related to threads and teams.
* We now discriminate correctly between process and thread signals. Signal
handlers have been moved to teams. Fixes #5679.
* Implemented real-time signal support, including signal queuing, SA_SIGINFO
support, sigqueue(), sigwaitinfo(), sigtimedwait(), waitid(), and the addition
of the real-time signal range. Closes #1935 and #2695.
* Gave SIGBUS a separate signal number. Fixes #6704.
* Implemented <time.h> clock and timer support, and fixed/completed alarm() and
[set]itimer(). Closes #5682.
* Implemented support for thread cancellation. Closes #5686.
* Moved send_signal() from <signal.h> to <OS.h>. Fixes #7554.
* Lots over smaller more or less related changes.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42116 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 9e101ddfcc27b446a8a75065a6c49b7e1135477c 09-Jun-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

Definition for CR4 PAE bit.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37073 a95241bf-73f2-0310-859d-f6bbb57e9c96


# c3e021e8629592850fecb7cf98a0cc2cf055a0d9 05-Jun-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

x86:
* Renamed i386_context_switch() to x86_context_switch().
* x86_context_switch() no longer sets the page directory.
arch_thread_context_switch() does that explicitly, now. This allows to solve
the TODO by reordering releasing the previous paging structures reference and
setting the new page directory.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37024 a95241bf-73f2-0310-859d-f6bbb57e9c96


# fabdf00e6a5b3bd8b152e8655f3b58f12f8c88be 05-Jun-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

Renamed i386_swap_pgdir() to x86_swap_pgdir.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37023 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 8421714089091fc545726be0654e13d29de1f1ae 05-Jun-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

x86:
* Renamed vm_translation_map_arch_info to X86PagingStructures, and all
members and local variables of that type accordingly.
* arch_thread_context_switch(): Added TODO: The still active paging structures
can indeed be deleted before we stop using them.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@37022 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 147133b76cbb1603bdbff295505f5b830cb4e688 25-May-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

* First run through the kernel's private parts to use phys_{addr,size}_t
where appropriate.
* Typedef'ed page_num_t to phys_addr_t and used it in more places in
vm_page.{h,cpp}.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36937 a95241bf-73f2-0310-859d-f6bbb57e9c96


# feddedab0ca4fa1c553af10a3ed6066a840d0bea 25-Mar-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

x86:
Added fields for temporary storage of the debug registers dr6 and dr7 to the
arch_cpu_info structure. The actual registers are stored at the beginning of
x86_exit_user_debug_at_kernel_entry() and read in
x86_handle_debug_exception().
The problem was that x86_exit_user_debug_at_kernel_entry() itself overwrote
dr7 and, if kernel breakpoints were enabled, dr6 could be overwritten anytime
after. So x86_handle_debug_exception() would find incorrect values in the
registers (definitely in dr7) and thus interpret the detected debug condition
incorrectly. Usually watchpoints were recognized as breakpoints.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35951 a95241bf-73f2-0310-859d-f6bbb57e9c96


# dac21d8bfe3fcb0ee34a4a0c866c2474bfb8b155 18-Feb-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

* map_physical_memory() does now always set a memory type. If none is given (it
needs to be or'ed to the address specification), "uncached" is assumed.
* Set the memory type for the "BIOS" and "DMA" areas to write-back. Not sure, if
that's correct, but that's what was effectively used on my machines before.
* Changed x86_set_mtrrs() and the CPU module hook to also set the default memory
type.
* Rewrote the MTRR computation once more:
- Now we know all used memory ranges, so we are free to extend used ranges
into unused ones in order to simplify them for MTRR setup.
- Leverage the subtractive properties of uncached and write-through ranges to
simplify ranges of any other respectively write-back type.
- Set the default memory type to write-back, so we don't need MTRRs for the
RAM ranges.
- If a new range intersects with an existing one, we no longer just fail.
Instead we use the strictest requirements implied by the ranges. This fixes
#5383.

Overall the new algorithm should be sufficient with far less MTRRs than before
(on my desktop machine 4 are used at maximum, while 8 didn't quite suffice
before). A drawback of the current implementation is that it doesn't deal with
the case of running out of MTRRs at all, which might result in some ranges
having weaker caching/memory ordering properties than requested.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@35515 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 924a3e5f9b7a6db6fbe14378ba920c6b943f78e9 09-Jan-2010 Ingo Weinhold <ingo_weinhold@gmx.de>

Removed unused <arch>_switch_stack_and_call() and
arch_thread_switch_kstack_and_call().


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34971 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 34a48c70efb9ce4fd54db2ef76d95e9c2ff9ec2e 07-Dec-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

Added type nanotime_t (an int64 storing a nanoseconds value) and function
system_time_nsecs(), returning the system time in nanoseconds. The function
is only really implemented for x86. For the other architectures
system_time() * 1000 is returned.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34543 a95241bf-73f2-0310-859d-f6bbb57e9c96


# bb163c0289ef6ea5d1d6162f0178273c8933a7c0 23-Nov-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

* Added a set_mtrrs() hook to x86_cpu_module_info, which is supposed to set
all MTRRs at once.
* Added a respective x86_set_mtrrs() kernel function.
* x86 CPU module:
- Implemented the new hook.
- Prefixed most debug output with the CPU index. Otherwise it gets quite
confusing with multiple CPUs.
- generic_init_mtrrs(): No longer clear all MTRRs, if they are already
enabled. This lets us benefit from the BIOS's setup until we install our
own -- otherwise with caching disabled things are *really* slow.
* arch_vm.cpp: Completely rewrote the MTRR handling as the old one was not
only slow (O(2^n)), but also broken (resulting in incorrect setups (e.g.
with cachable ranges larger than requested)), and not working by design for
certain cases (subtractive setups intersecting ranges added later).
Now we maintain an array with the successfully set ranges. When a new range
is added, we recompute the complete MTRR setup as we need to. The new
algorithm analyzing the ranges has linear complexity and also handles range
base addresses with an alignment not matching the range size (e.g. a range
at address 0x1000 with size 0x2000) and joining of adjacent/overlapping
ranges of the same type.

This fixes the slow graphics on my 4 GB machine (though unfortunately the
8 MTRRs aren't enough to fully cover the complete frame buffer (about 35
pixel lines remain uncachable), but that can't be helped without rounding up
the frame buffer size, for which we don't have enough information). It might
also fix #1823.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@34197 a95241bf-73f2-0310-859d-f6bbb57e9c96


# d337132b4151ad0b378a4a5ee895f0ee0a064f23 27-Oct-2009 Axel Dörfler <axeld@pinc-software.de>

* Coding style cleanup, no functional change.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33792 a95241bf-73f2-0310-859d-f6bbb57e9c96


# ea2abd110bd6a4518a954477562e2dd94a5fef9d 02-Aug-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

* Renamed the ROUNDOWN macro to ROUNDDOWN. Also changed the implementation of
ROUNDUP to use '*' and '/' -- the compiler will optimize that for powers of
two anyway and this implementation works for other numbers as well.
* The thread::fault_handler use in C[++] code was broken with gcc 4. At least
when other functions were invoked. Trying to trick the compiler wasn't a
particularly good idea anyway, since the next compiler version could break
the trick again. So the general policy is to use the fault handlers only in
assembly code where we have full control. Changed that for x86 (save for the
vm86 mode, which has a similar mechanism), but not for the other
architectures.
* Introduced fault_handler, fault_handler_stack_pointer, and fault_jump_buffer
fields in the cpu_ent structure, which must be used instead of
thread::fault_handler in the kernel debugger. Consequently user_memcpy() must
not be used in the kernel debugger either. Introduced a debug_memcpy()
instead.
* Introduced debug_call_with_fault_handler() function which calls a function
in a setjmp() and fault handler context. The architecture specific backend
arch_debug_call_with_fault_handler() has only been implemented for x86 yet.
* Introduced debug_is_kernel_memory_accessible() for use in the kernel
debugger. It determines whether a range of memory can be accessed in the
way specified. The architecture specific back end
arch_vm_translation_map_is_kernel_page_accessible() has only been implemented
for x86 yet.
* Added arch_debug_unset_current_thread() (only implemented for x86) to unset
the current thread pointer in the kernel debugger. When entering the kernel
debugger we do some basic sanity checks of the currently set thread structure
and unset it, if they fail. This allows certain commands (most importantly
the stack trace command) to avoid accessing the thread structure.
* x86: When handling a double fault, we do now install a special handler for
page faults. This allows us to gracefully catch faulting commands, even if
e.g. the thread structure is toast.

We are now in much better shape to deal with double faults. Hopefully avoiding
the triple faults that some people have been experiencing on their hardware
and ideally even allowing to use the kernel debugger normally.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32073 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 671a2442d93f46c5343ef34e01306befa760c16a 31-Jul-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

More work towards making our double fault handler less triple fault prone:
* SMP:
- Added smp_send_broadcast_ici_interrupts_disabled(), which is basically
equivalent to smp_send_broadcast_ici(), but is only called with interrupts
disabled and gets the CPU index, so it doesn't have to use
smp_get_current_cpu() (which dereferences the current thread).
- Added cpu index parameter to smp_intercpu_int_handler().
* x86:
- arch_int.c -> arch_int.cpp
- Set up an IDT per CPU. We were using a single IDT for all CPUs, but that
can't work, since we need different tasks for the double fault interrupt
vector.
- Set the per CPU double fault task gates correctly.
- Renamed set_intr_gate() to set_interrupt_gate and set_system_gate() to
set_trap_gate() and documented them a bit.
- Renamed double_fault_exception() x86_double_fault_exception() and fixed
it not to use smp_get_current_cpu(). Instead we have the new
x86_double_fault_get_cpu() that deducts the CPU index from the used stack.
- Fixed the double_fault interrupt handler: It no longer calls int_bottom to
avoid accessing the current thread.
* debug.cpp:
- Introduced explicit debug_double_fault() to enter the kernel debugger from
a double fault handler.
- Avoid using smp_get_current_cpu().
- Don't use kprintf() before sDebuggerOnCPU is set. Otherwise
acquire_spinlock() is invoked by arch_debug_serial_puts().

Things look a bit better when the current thread pointer is broken -- we run
into kernel_debugger_loop() and successfully print the "Welcome to KDL"
message -- but we still dereference the thread pointer afterwards, so that we
don't get a usable kernel debugger yet.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32050 a95241bf-73f2-0310-859d-f6bbb57e9c96


# cc77aba1013a9d850fdf17c5a4338c3ad65c98b7 31-Jul-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

* Allocate a separate double fault stack for each CPU.
* Added x86_double_fault_get_cpu(), a save way to get the CPU index when in
the double fault handler. smp_get_current_cpu() requires at least a somewhat
intact thread structure, so we rather want to avoid it when handling a double
fault. There are a lot more of those dependencies in the KDL entry code.
Working on it...


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@32028 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 8b3b05cbf9cfc334c4abc5dc22d4706d36b93115 20-Apr-2009 Ingo Weinhold <ingo_weinhold@gmx.de>

Synchronize the TSCs of all CPUs early in the boot process, so system_time()
will return consistent values. This helps with debug measurements for the time
being. Obviously we'll have to think of something different when we support
speed-stepping on models with frequency-dependent TSCs.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@30287 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 9a42ad7a77f11cf1b857e84ec70d21b1afaa71cd 22-Oct-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

When switching to a kernel thread we no longer set the page directory.
This is not necessary, since userland teams' page directories also
contain the kernel mappings, and avoids unnecessary TLB flushes. To make
that possible the vm_translation_map_arch_info objects are reference
counted now.

This optimization reduces the kernel time of the Haiku build on my
machine with SMP disabled a few percent, but interestingly the total
time decreases only marginally. Haven't tested with SMP yet, but for
full impact CPU affinity would be needed.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@28287 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 78c90d44cad4b0e03bdd9d0590525d07dafb3bc4 17-Oct-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

Moved definition of the PAUSE macro to <cpu.h>, respectively
<arch/cpu.h>.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@28221 a95241bf-73f2-0310-859d-f6bbb57e9c96


# b18c9b97aeb4a7af1c5bca0bc99f02ad19e716f4 10-Oct-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

* Implemented x86 assembly version of memset().
* memset() is now available through the commpage.
* CPU modules can provide a model-optimized memset().


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@27952 a95241bf-73f2-0310-859d-f6bbb57e9c96


# cb387cfb2f88cf171120d5c8a93f4c2a9680db9f 10-Sep-2008 Axel Dörfler <axeld@pinc-software.de>

* Added acpi_shutdown() method. If the ACPI bus manager is installed, this will
be used now. Tested only with VMware so far.
* apm_shutdown() is now called with interrupts turned on.
* Renamed arch_cpu.c to arch_cpu.cpp.
* Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@27404 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 783c4e20b44b7d78b9300e58a3e911fed018fd05 04-Aug-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

Added comment.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26806 a95241bf-73f2-0310-859d-f6bbb57e9c96


# bca3215f8a67e154bbf033a44916b18196d2d546 03-Aug-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

* Introduced x86_get_double_fault_stack(), which returns the address
and size of the double fault stack.
* is_kernel_stack_address() does now also check whether the given
address is on the double fault stack. This fixes stack traces on
double faults, which were broken (i.e. went only to the double fault
iframe) since we started checking whether the addresses are on the
kernel stack at all.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26775 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 011d716270fea8e557708235341a006d6433b71c 02-Aug-2008 Axel Dörfler <axeld@pinc-software.de>

* Removed the feature_string from the cpu_ent structure.
* Dumping the features as string is now a one time thing, that only happens
when DUMP_FEATURE_STRING is defined to 1.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26733 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 15173df4e9123a4dd082e11f26dba14411b819bf 22-May-2008 Axel Dörfler <axeld@pinc-software.de>

Last patch of the vm86 patch series from Jan Klötzke - thanks!:
* The new function vm86_do_int(struct vm86_state *state, uint8 vec) provides a
facility to call BIOS interupt handlers. The function must only be called from
a user thread context because the lower 1MB of the address space is used.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25610 a95241bf-73f2-0310-859d-f6bbb57e9c96


# bb107c4e29877ab7be19fbe8c52eef01d44b03cd 22-May-2008 Axel Dörfler <axeld@pinc-software.de>

Patch by Jan Klötzke:
* In vm86 mode CS will have arbitrary values so we check for both USER_CODE_SEG
and the VM flag in EFLAGS. This is also done when entering interrupt gates.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25607 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7a66a9b8e476624da754a94c071f94d436408a7a 21-Mar-2008 Bruno G. Albuquerque <bga@bug-br.org.br>

- Added support in system info for extended cpu family and model.
- Take extended family and model into account when generating the cpu
type and revision.
- Added Intel Core 2 Extreme to the cpu list.

Please review.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@24509 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 34b3b26b3b8c46ba46ddde037b10dd173f4936d6 10-Jan-2008 Ingo Weinhold <ingo_weinhold@gmx.de>

Merged branch haiku/branches/developer/bonefish/optimization revision
23139 into trunk, with roughly the following changes (for details svn
log the branch):
* The int 99 syscall handler is now fully in assembly.
* Added a sysenter/sysexit handler and use it on Pentiums that support
it (via commpage).
* Got rid of i386_handle_trap(). A bit of functionality was moved into
the assembly handler which now uses a jump table to call C functions
handling the respective interrupt.
* Some optimizations to get user debugger support code out of the
interrupt handling path.
* Introduced a thread::flags fields which allows to skip handling of
rare events (signals, user debug enabling/disabling) on the
common interrupt handling path.
* Got rid of the explicit iframe stack. The iframes can still be
retrieved by iterating through the stack frames.
* Made the commpage an architecture independent feature. It's used for
the real time data stuff (instead of creating a separate area).
* The x86 CPU modules can now provide processor optimized versions for
common functions (currently memcpy() only). They are used in the
kernel and are provided to the userland via commpage entries.
* Introduced build system feature allowing easy use of C structure
member offsets in assembly code.

Changes after merging:
* Fixed merge conflict in src/system/kernel/arch/x86/arch_debug.cpp
(caused by refactoring and introduction of "call" debugger command).



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@23370 a95241bf-73f2-0310-859d-f6bbb57e9c96


# dfb5375d18ecb62038ad999e2af23fe584354c3d 13-Feb-2007 Travis Geiselbrecht <geist@foobox.com>

clean up TSS initialization.

Now two complete tss structures exist within the per-cpu structure. Instead
of having to create a seperate area per each one, initialize them in place.
Also, the old mechanism to getting all of the cpus to get initialized was
subtly broken, but still managed to work. Now, just force all the cpus to
initialize at boot, which makes the actual swapping of esp0 somewhat simpler.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@20131 a95241bf-73f2-0310-859d-f6bbb57e9c96


# dcdc4f4b435491550377a93954df5e1f8c5a384e 04-Feb-2007 Travis Geiselbrecht <geist@foobox.com>

pulled over some stuff from newos:
at boot, per cpu, detect the cpu, pull down all the relevant cpuid bits and
save them into the per-cpu structure. Changed most of the code scattered here
and there that reads the cpuid to use a new api, x86_check_feature, which looks
at the saved bits.
Also changed the system_info stuff to read from these bits.
While i was at it, refreshed all the bits to be current.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@20072 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 9ecaa867f7ba62d9edf0b192aba4b809b9de0d82 22-Jan-2007 Axel Dörfler <axeld@pinc-software.de>

Applied patch by Vasilis Kaoutsis: now checks for the MSR feature as well; obviously
some Pentium 200 MMX pretend to support MTRRs.
This should fix bug #553.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@19899 a95241bf-73f2-0310-859d-f6bbb57e9c96


# fa4858af266be4610cb09a91287df56d941433e8 12-Jan-2007 Axel Dörfler <axeld@pinc-software.de>

Didn't notice that x86_enter_userspace() also copied the thread entry's arguments to
the userland stack in an unsafe way - moved that stuff to arch_thread_enter_userspace(), too.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@19778 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 8fc075ac5cf7b369f1dddd62d13f07ca8bfe11f1 12-Jan-2007 Axel Dörfler <axeld@pinc-software.de>

* There was no reason to copy the "userland calls exit_thread()" stub with interrupts
turned off - accessing userland memory. Now, arch_thread_enter_userspace() does that
job, and as a result, may also fail.
* dump_thread() now directly prints the info of the current thread when used without
argument (rather than iterating the thread list to look for the current thread).
* If arch_thread_init_tls() fails upon thread creation, the function will now return
an error.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@19775 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 2a03240eb11841854880b11dc5e522823f2ecef2 29-Apr-2006 Michael Lotz <mmlr@mlotz.ch>

Reverted my last change as it turned out that the lazy FPU state handling was not SMP safe afterall and the performance gain is questionable. Maybe it'll be implemented correctly in the future. Sorry for any inconvenience this may have cost.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17272 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7eee76e65a81333e46c8f319d39ccb7f95be53be 27-Apr-2006 Michael Lotz <mmlr@mlotz.ch>

Implemented lazy FPU state save/restore. In the end mostly ported from NewOS. SMP safe.

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17251 a95241bf-73f2-0310-859d-f6bbb57e9c96


# f94b06f9928589e79e3d79399cdc6f14cb317658 02-Mar-2006 Axel Dörfler <axeld@pinc-software.de>

Implemented SSE2/3 support (tested with VLC).


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@16569 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 09bb4e9ac5dc193f63b02b33e88085f22d8719ab 03-Jan-2006 Ingo Weinhold <ingo_weinhold@gmx.de>

The real_time_data structure contains an architecture specific
substructure now (that's the only member actually). The system time
offset is therefore accessed via architecture specific accessor
functions.
Note, that this commit breaks the PPC build. Since I want to rename at
least one file I've already changed, I can't avoid that.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15835 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7d7f4675bbf52a6dde05a9de5a370a38a7c078ef 15-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

* Added some cpuid eax == 1 feature definitions to arch_cpu.h
* Renamed IA32_MTR_WRITE_COMBINED to IA32_MTR_WRITE_COMBINING.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15559 a95241bf-73f2-0310-859d-f6bbb57e9c96


# e0e9a3e69f18220cf21cd2fa8ba2d9fb794b922b 14-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

* We now support the global page feature of x86 processors that prevents
kernel TLBs from being flushed on context switch.
* new arch_cpu_user_TLB_invalidate() that now does what arch_cpu_global_TLB_invalidate()
did before.
* arch_cpu_global_TLB_invalidate() will now flush all TLBs, even those from the
kernel.
* some cleanups.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15535 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 51a3c450bebefa32a5636bc6078bdd648818da41 13-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

The short story: we now have MTRR support on Intel and AMD CPUs (the latter
has not yet been tested, though - I'll do this after this commit):
* Removed the arch_memory_type stuff from vm_area; since there are only 8 memory
ranges on x86, it's simply overkill. The MTRR code now remembers the area ID
and finds the MTRR that way (it could also iterate over the existing MTRRs).
* Introduced some post_modules() init functions.
* If the other x86 CPUs out there don't differ a lot, MTRR functionality might
be put back into the kernel.
* x86_write_msr() was broken, it wrote the 64 bit number with the 32 bit words
switched - it took me some time (and lots of #GPs) to figure that one out.
* Removed the macro read_ebp() and introduced a function x86_read_ebp()
(it's not really a time critical call).
* Followed the Intel docs on how to change MTRRs (symmetrically on all CPUs
with caches turned off).
* Asking for memory types will automatically change the requested length to
a power of two - note that BeOS seems to behave in the same, although that's
not really very clean.
* fixed MTRRs are ignored for now - we should make sure at least, though,
that they are identical on all CPUs (or turn them off, even though I'd
prefer the BIOS stuff to be uncacheable, which we don't enforce yet, though).



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15528 a95241bf-73f2-0310-859d-f6bbb57e9c96


# d49423aea3f6e8edbb24bcc5c434543fc91f2a3b 12-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

Added a wbinvd() macro.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15526 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 2ed21b85257d9d36d4d8a25c2a798a42add6e618 12-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

Some work in progress of the MTRR support. Shouldn't do any harm yet :-)


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15525 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7c0a93573b061c8ff2b1e9e8644eb3943c1f5855 12-Dec-2005 Axel Dörfler <axeld@pinc-software.de>

Preparation for MTRR support, code is completely untested, though.
The CPU specific MTRR code will be in modules.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@15520 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7b7c38a2a77b408d1bbb252a003911fa5383e861 04-Nov-2005 Axel Dörfler <axeld@pinc-software.de>

The "where" or "sc" command now switches the page directory to the specified thread
to be able to follow the stack trace into userland.
No symbols there, yet, though.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@14697 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 90ce9e83055b43507010f0f0f483a2515673e949 26-Oct-2005 Axel Dörfler <axeld@pinc-software.de>

Added calls to read and write the MSR, the machine state register.
Minor cleanup.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@14537 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 8e26b085e5a670068c97f26ac33a90d930c4dc5d 04-Apr-2005 Ingo Weinhold <ingo_weinhold@gmx.de>

Fixed double fault handler. Personally I disclaim all responsiblity
for these changes. I was mostly just staring in amazement at the screen
while Axel and Thomas were discussing IA32 internals. A particularly
fascinating moment was when Thomas produced the cause of a bug we had
been trying to track down for hours off the top of his head (of course
iret behaves specially when the NT bit is set :-). His slowness must be
excused though, since he hadn't slept for more then 30 hours. ;-)

The code doesn't wholeheartedly deal with multi-processor machines yet.
Axel will certainly do some cleanup...


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@12239 a95241bf-73f2-0310-859d-f6bbb57e9c96


# edb55663938398f6cd835c2d6e18cb41b9d271e9 04-Apr-2005 Axel Dörfler <axeld@pinc-software.de>

Fixed struct tss; there is no ss3/sp3.
Moved ptentry/pdentry to arch_vm_translation_map.c and renamed them to
page_table_entry and page_directory_entry.
Fixed a race condition that happened when memory was remapped (which
can currently happen because lock_memory() does not work correctly, and
there might be other conditions as well, like certain vm_store fault
handlers). Now, page table and directory entries are updated atomically.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@12229 a95241bf-73f2-0310-859d-f6bbb57e9c96


# c8d7534e5d67a8a390d53e9172aebc85f5f053ec 01-Mar-2005 Ingo Weinhold <ingo_weinhold@gmx.de>

* Made C++ save.
* Made the parameter for restoring the FPU state const.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@11522 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 98dbeb36df30316c6905f12ee3cd4d99ba2491d1 24-Feb-2005 Ingo Weinhold <ingo_weinhold@gmx.de>

Added note to keep struct iframe in sync with the struct cpu_state.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@11471 a95241bf-73f2-0310-859d-f6bbb57e9c96


# c2c20b7848e5db7d21a73cc8c23aa446192ad72f 13-Dec-2004 Axel Dörfler <axeld@pinc-software.de>

Incorporated some code from NewOS to set up a double fault handler.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@10444 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 6a689590ce60a61ef5a4793d674ac1477f28b45c 19-Nov-2004 Axel Dörfler <axeld@pinc-software.de>

Removed unneeded includes of ktypes.h.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@10036 a95241bf-73f2-0310-859d-f6bbb57e9c96


# afad65ded7a1258fc91659fb456f1a90d08e0598 19-Oct-2004 Axel Dörfler <axeld@pinc-software.de>

Replaced all remaining PAGE_SIZE with B_PAGE_SIZE, addr with addr_t.
Removed the definition of PAGE_SIZE and addr.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@9433 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 3490a4becc6635d70c46ff8d7461833550fc1c08 11-Oct-2004 Axel Dörfler <axeld@pinc-software.de>

No longer needs the arch_thread.h header.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@9293 a95241bf-73f2-0310-859d-f6bbb57e9c96


# c2d416e259a2e289547d0c39c055ab4a95632687 10-Sep-2004 Axel Dörfler <axeld@pinc-software.de>

Partially covered by arch_config.h and support/ByteOrder.h now/already.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8900 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 75df143732f533d02f9b3b3043de1308bca3e934 01-Sep-2004 Ingo Weinhold <ingo_weinhold@gmx.de>

Introduced a macro specifying the type function parameters are aligned to. Not nice, but seems to help with the automatic generation of syscall code (at least on x86).


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8783 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 5fe840b9b51fa8f9f0b4b31106ec92258cda9e14 21-Aug-2003 beveloper <beveloper@nowhere.fake>

fixed address checking in ppc atomic functions.
fixed compilation on x86.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@4361 a95241bf-73f2-0310-859d-f6bbb57e9c96


# ff6ff33a9d7dd0b18a6f0005250bb71fca8b9ad7 19-May-2003 Axel Dörfler <axeld@pinc-software.de>

Put spaces between "::" in the asm directive to let it compile in C++ mode.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@3262 a95241bf-73f2-0310-859d-f6bbb57e9c96


# a02a5888af17e257161fa59ac3b8ca663b5a2673 18-Apr-2003 Axel Dörfler <axeld@pinc-software.de>

Added another argument parameter for the thread creation code. Helps
implementing a more efficient on_exit_thread().


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@3073 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 074a16b53e0cd1fb421183e7b11242205e38be56 07-Jan-2003 Axel Dörfler <axeld@pinc-software.de>

Added a private tls.h file with definitions for the reserved TLS slots.
Renamed i386_set_kstack() to i386_set_tss_and_kstack(), because that's what
it does.
Added a new function arch_thread_init_tls() which must be called after
having allocated the TLS area.
Renamed arch_thread_initialize_kthread_stack() to arch_thread_init_kthread_stack()
to be more consistent.
Changed the parameters for arch_thread_enter_uspace() - it now gets a pointer
to the thread structure and takes the user stack pointer from there (which
might also be architectural different).


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@2379 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 7208e95f0ebfb66272c2059aa23bc45446ad4e0f 06-Jan-2003 Axel Dörfler <axeld@pinc-software.de>

Moved the gdt_idt_descr struct from arch_stage2.h to stage2_priv.h.
Moved the tss_descriptor structure to descriptor.h, updated it to be a
segment_descriptor structure, and provided inlines for set_tss_descriptor(),
set_segment_descriptor(), set_segment_descriptor_base(), and
clear_segment_descriptor().
Also added defines for the different privilege levels and descriptor types.
Removed the unusused and incorrect TSS definition, introduced new
TSS_BASE_SEGMENT and TLS_BASE_SEGMENT macros.
Removed include of arch/cpu.h in arch_cpu.h.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@2360 a95241bf-73f2-0310-859d-f6bbb57e9c96


# f510e6ce601d2e7f3f88df110749a5bf02e79268 23-Oct-2002 lillo <lillo@nowhere.fake>

posix signals support, 1st pass


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@1623 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 5ca8da7a4b46342b22fa985c7813b558f831484f 13-Aug-2002 Axel Dörfler <axeld@pinc-software.de>

Backported the new stack crawl command ("sc", not "bt" like in NewOS) from
NewOS. Untested yet, though.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@750 a95241bf-73f2-0310-859d-f6bbb57e9c96


# fde77afb37de0aee545dcd21b90db681cb00d784 24-Jul-2002 notion <notion@nowhere.fake>

Ported my NewOS changes to OpenBeOS.

A couple of changes in various interrupt and thread functions and structures.
These make it now possible to change the stack at any time without making the kernel crash. This is needed for calling VESA 3.0 VBE functions through the protected mode interface.


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@422 a95241bf-73f2-0310-859d-f6bbb57e9c96


# 52a380120846174213ccce9c4aab0dda17c72083 08-Jul-2002 ejakowatz <ejakowatz@nowhere.fake>

It is accomplished ...


git-svn-id: file:///srv/svn/repos/haiku/trunk/current@10 a95241bf-73f2-0310-859d-f6bbb57e9c96