arch_mmu_amcc440.h revision b6f76ebe
1/*
2** Copyright 2003, Axel D��rfler, axeld@pinc-software.de. All rights reserved.
3** Distributed under the terms of the MIT License.
4*/
5#ifndef _KERNEL_ARCH_PPC_MMU_AMCC440_H
6#define _KERNEL_ARCH_PPC_MMU_AMCC440_H
7
8
9#include <SupportDefs.h>
10#include <string.h>
11
12#include <arch_cpu.h>
13
14
15/*** TLB - translation lookaside buffer ***/
16
17#define TLB_COUNT	64
18
19/** valid tlb length values */
20enum tlb_length {
21	TLB_LENGTH_1kB		= 0x0,
22	TLB_LENGTH_4kB		= 0x1,
23	TLB_LENGTH_16kB		= 0x2,
24	TLB_LENGTH_64kB		= 0x3,
25	TLB_LENGTH_256kB	= 0x4,
26	TLB_LENGTH_1MB		= 0x5,
27	TLB_LENGTH_16MB		= 0x7,
28	TLB_LENGTH_256MB	= 0x9,
29};
30
31#define TLB_V	0x200
32
33/** structure of a real TLB entry */
34//FIXME
35struct tlb_entry {
36	// word 0
37	uint32	effective_page_number : 22;
38	uint32	valid : 1;
39	uint32	translation_address_space : 1;
40	uint32	page_size : 4;
41	uint32	parity_1 : 4;
42	//uint32	translation_id : 8;
43//FIXME:rest is Classic stuff
44	// word 0
45	// upper 32 bit
46	uint32	page_index : 15;				// BEPI, block effective page index
47	uint32	_reserved0 : 4;
48	uint32	length : 11;
49	uint32	kernel_valid : 1;				// Vs, Supervisor-state valid
50	uint32	user_valid : 1;					// Vp, User-state valid
51	// lower 32 bit
52	uint32	physical_block_number : 15;		// BPRN
53	uint32	write_through : 1;				// WIMG
54	uint32	caching_inhibited : 1;
55	uint32	memory_coherent : 1;
56	uint32	guarded : 1;
57	uint32	_reserved1 : 1;
58	uint32	protection : 2;
59
60	tlb_entry()
61	{
62		Clear();
63	}
64
65	void SetVirtualAddress(void *address)
66	{
67		page_index = uint32(address) >> 17;
68	}
69
70	void SetPhysicalAddress(void *address)
71	{
72		physical_block_number = uint32(address) >> 17;
73	}
74
75	void Clear()
76	{
77		memset((void *)this, 0, sizeof(tlb_entry));
78	}
79};
80
81#if 0 // XXX:Classic
82/*** PTE - page table entry ***/
83
84enum pte_protection {
85	PTE_READ_ONLY	= 3,
86	PTE_READ_WRITE	= 2,
87};
88
89struct page_table_entry {
90	// upper 32 bit
91	uint32	valid : 1;
92	uint32	virtual_segment_id : 24;
93	uint32	secondary_hash : 1;
94	uint32	abbr_page_index : 6;
95	// lower 32 bit
96	uint32	physical_page_number : 20;
97	uint32	_reserved0 : 3;
98	uint32	referenced : 1;
99	uint32	changed : 1;
100	uint32	write_through : 1;				// WIMG
101	uint32	caching_inhibited : 1;
102	uint32	memory_coherent : 1;
103	uint32	guarded : 1;
104	uint32	_reserved1 : 1;
105	uint32	page_protection : 2;
106
107	static uint32 PrimaryHash(uint32 virtualSegmentID, uint32 virtualAddress);
108	static uint32 SecondaryHash(uint32 virtualSegmentID, uint32 virtualAddress);
109	static uint32 SecondaryHash(uint32 primaryHash);
110};
111
112struct page_table_entry_group {
113	struct page_table_entry entry[8];
114};
115
116extern void ppc_get_page_table(page_table_entry_group **_pageTable, size_t *_size);
117extern void ppc_set_page_table(page_table_entry_group *pageTable, size_t size);
118
119static inline segment_descriptor
120ppc_get_segment_register(void *virtualAddress)
121{
122	return (segment_descriptor)get_sr(virtualAddress);
123}
124
125
126static inline void
127ppc_set_segment_register(void *virtualAddress, segment_descriptor segment)
128{
129	set_sr(virtualAddress, *(uint32 *)&segment);
130}
131
132#endif
133
134#endif	/* _KERNEL_ARCH_PPC_MMU_AMCC440_H */
135